The TPS382x family of supervisors provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power-on, RESET asserts when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage, VIT-. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td, starts after VDD has risen above the threshold voltage, VIT-. When the supply voltage drops below the threshold voltage VIT-, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage, VIT-, set by an internal voltage divider.
The TPS3820/3/5/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3824/5 devices include a high-level output RESET. TPS3820/3/4/8 have a watchdog timer that is periodically triggered by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, Itout, RESET becomes active for the time period td. This event also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog. In applications where the input to the WDI pin may be active (transitioning high and low) when the TPS3820/3/4/8 is asserting RESET, the TPS3820/3/4/8 does not return to a non-reset state when the input voltage is above VT.
If the application requires that input to WDI is active when RESET pin is asserted, then the “A” version of the device should be used. The “A” versions will not latch the RESET to the asserted state if a WDI pulse is received while RESET is asserted.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in an SOT23-5 package. The TPS382x devices are characterized for operation over a temperature range of -40°C to 85°C.