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MDD(Microdiode Semiconductor) 74LVC1G08GS
| Manufacturer | MDD(Microdiode Semiconductor)Asian Brands |
| MPN | 74LVC1G08GS |
| LCSC Part # | C53552929 |
| Packaging | DFN-6L(1x1) |
| Customer # | |
| Key Attributes | 100nA 1.65V~5.5V 3.6ns@4.5V,50pF DFN-6L(1x1) Gates and Inverters RoHS |
| Datasheet |  MDD(Microdiode Semiconductor) 74LVC1G08GS |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | MDD(Microdiode Semiconductor) | |
| Packaging | DFN-6L(1x1) | |
| Features | - | |
| Logic Family | 74LVC | |
| Input Logic Level - Low | 700mV;800mV | |
| Input Logic Level - High | 1.7V;2V | |
| Operating Temperature | -40℃~+125℃ | |
| Output Logic Level - High | 1.2V;1.9V;2.2V;2.3V;3.8V | |
| Quiescent Current(Iq) | 100nA | |
| Voltage - Supply | 1.65V~5.5V | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 2;1 | |
| Output Logic Level - Low | 100mV;450mV;300mV;400mV;550mV | |
| Propagation Delay | 3.6ns@4.5V,50pF | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G08 is a single 2-input AND gate. The inputs can be driven by 3.3 V or 5 V devices. This feature allows these devices to be used as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action on all inputs enables the circuit to tolerate slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the output, preventing damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- High noise immunity
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Direct TTL-level interface
- Input overvoltage tolerance up to 5.5 V
- IOFF circuit for partial power-down mode operation
- Latch-up performance exceeds 100 mA
- JEDEC standard compliant:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V
- MM JESD22-A115C Class C exceeds 550 V
- CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1194 | $ 0.60 |
| 50+ | $ 0.095 | $ 4.75 |
| 150+ | $ 0.0828 | $ 12.42 |
| 500+ | $ 0.0736 | $ 36.80 |
| 3,000+ | $ 0.0663 | $ 198.90 |
| 6,000+ | $ 0.0626 | $ 375.60 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | MDD(Microdiode Semiconductor) | |
| Packaging | DFN-6L(1x1) | |
| Features | - | |
| Logic Family | 74LVC | |
| Input Logic Level - Low | 700mV;800mV | |
| Input Logic Level - High | 1.7V;2V | |
| Operating Temperature | -40℃~+125℃ | |
| Output Logic Level - High | 1.2V;1.9V;2.2V;2.3V;3.8V | |
| Quiescent Current(Iq) | 100nA | |
| Voltage - Supply | 1.65V~5.5V | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 2;1 | |
| Output Logic Level - Low | 100mV;450mV;300mV;400mV;550mV | |
| Propagation Delay | 3.6ns@4.5V,50pF | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G08 is a single 2-input AND gate. The inputs can be driven by 3.3 V or 5 V devices. This feature allows these devices to be used as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action on all inputs enables the circuit to tolerate slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the output, preventing damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- High noise immunity
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Direct TTL-level interface
- Input overvoltage tolerance up to 5.5 V
- IOFF circuit for partial power-down mode operation
- Latch-up performance exceeds 100 mA
- JEDEC standard compliant:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V
- MM JESD22-A115C Class C exceeds 550 V
- CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |