MDD(Microdiode Semiconductor) 74LVC1G00GW
| Manufacturer | MDD(Microdiode Semiconductor)Asian Brands |
| MPN | 74LVC1G00GW |
| LCSC Part # | C53185134 |
| Packaging | SOT-353 |
| Customer # | |
| Key Attributes | 1.65V~5.5V 3.8ns@4.5V,50pF 4uA SOT-353 Gates and Inverters RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | MDD(Microdiode Semiconductor) | |
| Packaging | SOT-353 | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 3.8ns@4.5V,50pF | |
| Output Logic Level - Low | 450mV;600mV;700mV;800mV | |
| Input Logic Level - Low | 700mV;800mV | |
| Features | - | |
| Operating Temperature | -40℃~+125℃ | |
| Input Logic Level - High | 1.7V;2V | |
| Output Logic Level - High | 1.2V;1.9V;2.2V;2.3V;3.8V | |
| Quiescent Current(Iq) | 4uA | |
| Number of Channels | 1;2 | |
| Current - Output High(IOH) | 32mA | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G00 is a single 2-input NAND gate. Its inputs can be driven by 3.3V or 5V devices, allowing this device to be used as a level translator in mixed 3.3V and 5V environments. All inputs feature Schmitt-trigger action, making the circuit tolerant of slower input rise and fall times. The device is fully suitable for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially destructive backflow currents when the device is powered down.
Features
- Wide supply voltage range: 1.65V to 5.5V
- Input overvoltage tolerance up to 5.5V
- High noise immunity
- CMOS low power consumption
- IOFF circuitry supports partial power-down mode operation
- ±24mA output drive capability (VCC = 3.0V)
- Latch-up performance exceeds 100mA
- Direct TTL-level interface compatible
- JEDEC standard compliant: JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8C (2.7V to 3.6V), JESD36 (4.5V to 5.5V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000V, MM JESD22-A115C Class C exceeds 550V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
- Multiple package options
| Qty | Unit Price | Total Amount |
|---|---|---|
| 10+ | $ 0.0701 | $ 0.70 |
| 100+ | $ 0.0553 | $ 5.53 |
| 300+ | $ 0.0479 | $ 14.37 |
| 3,000+ | $ 0.0424 | $ 127.20 |
| 6,000+ | $ 0.038 | $ 228.00 |
| 9,000+ | $ 0.0357 | $ 321.30 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | MDD(Microdiode Semiconductor) | |
| Packaging | SOT-353 | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 3.8ns@4.5V,50pF | |
| Output Logic Level - Low | 450mV;600mV;700mV;800mV | |
| Input Logic Level - Low | 700mV;800mV | |
| Features | - | |
| Operating Temperature | -40℃~+125℃ | |
| Input Logic Level - High | 1.7V;2V | |
| Output Logic Level - High | 1.2V;1.9V;2.2V;2.3V;3.8V | |
| Quiescent Current(Iq) | 4uA | |
| Number of Channels | 1;2 | |
| Current - Output High(IOH) | 32mA | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G00 is a single 2-input NAND gate. Its inputs can be driven by 3.3V or 5V devices, allowing this device to be used as a level translator in mixed 3.3V and 5V environments. All inputs feature Schmitt-trigger action, making the circuit tolerant of slower input rise and fall times. The device is fully suitable for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially destructive backflow currents when the device is powered down.
Features
- Wide supply voltage range: 1.65V to 5.5V
- Input overvoltage tolerance up to 5.5V
- High noise immunity
- CMOS low power consumption
- IOFF circuitry supports partial power-down mode operation
- ±24mA output drive capability (VCC = 3.0V)
- Latch-up performance exceeds 100mA
- Direct TTL-level interface compatible
- JEDEC standard compliant: JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8C (2.7V to 3.6V), JESD36 (4.5V to 5.5V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000V, MM JESD22-A115C Class C exceeds 550V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
- Multiple package options
C53185134 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
