HGSEMI CD4518BM/TR

The CD4518B dual BCD up counter and CD4520B dual binary up counter each contain two identical, internally synchronized 4-stage counters. The counter stages are constructed from D-type flip-flops with interchangeable clock and enable lines, allowing incrementing on either the rising or falling edge. In single-unit operation, the enable input is held high and the counter advances on each rising edge of the clock. The counters are reset to zero by a high level on their reset lines. Counters can be cascaded in ripple mode by connecting Q4 to the enable input of the subsequent counter while holding the subsequent counter's clock input low.

• High-voltage type (15V rating)
• CD4518B Dual BCD Up Counter
• CD4520B Dual Binary Up Counter
• Medium-speed operation: typical clock frequency of 6MHz at 10V
• Rising or falling edge triggered
• Synchronous internal carry propagation
• 100% tested for quiescent current at 15V
• 5V, 10V, and 15V parametric ratings
• Maximum input current of 1μA at 15V over full package temperature range; 100nA at 15V and +25℃
• Noise immunity (full package/temperature range)
• 1V at VDD = 5V
• 2V at VDD = 10V
• 2.5V at VDD = 15V
• Standardized symmetrical output characteristics
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

• Multi-stage synchronous counting
• Multi-stage ripple counting
• Frequency divider