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MDD(Microdiode Semiconductor) 74LVC1G97GW product image
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MDD(Microdiode Semiconductor) 74LVC1G97GWRoHS

Manufacturer
MDD(Microdiode Semiconductor)Asian Brands
MPN
74LVC1G97GW
LCSC Part #
C52953355
Packaging
SOT-363
Customer #
Key Attributes
100nA 1.65V~5.5V 5.5ns@4.5V,50pF SOT-363 Gates and Inverters RoHS
Datasheetpdf iconMDD(Microdiode Semiconductor) 74LVC1G97GW
In-Stock: 2,920
2,920 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.1091$ 0.55
50+$ 0.0868$ 4.34
150+$ 0.0756$ 11.34
500+$ 0.0673$ 33.65
3,000+$ 0.0606$ 181.80
6,000+$ 0.0572$ 343.20
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerMDD(Microdiode Semiconductor)
PackagingSOT-363
Input Logic Level - Low-
Input Logic Level - High-
Operating Temperature-40℃~+125℃
Logic Family74LVC
FeaturesLocal shutdown mode;Overvoltage-tolerant input
Output Logic Level - High-
Quiescent Current(Iq)100nA
Voltage - Supply1.65V~5.5V
Number of Channels1;3
Current - Output High(IOH)32mA
Output Logic Level - Low-
Propagation Delay5.5ns@4.5V,50pF
Current - Output Low(IOL)32mA
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Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74LVC1G97 is a configurable multi-function logic gate with Schmitt-trigger inputs. The device can be configured via 3-bit inputs to implement any of the following logic functions: multiplexer, AND, OR, NAND, NOR, inverter, and buffer. All inputs can be connected directly to VCC or GND. Inputs can be driven by 3.3V or 5V devices, allowing these devices to be used as level translators in mixed 3.3V and 5V environments. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs when the device is powered down, preventing potentially harmful backflow current from flowing through the device.

Features

AI Translation
  • Wide supply voltage range: 1.65V to 5.5V
  • Input overvoltage tolerance up to 5.5V
  • High noise immunity
  • ±24 mA output drive capability (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 200 mA
  • Direct TTL-level interface compatible
  • IOFF circuit supports partial power-down mode operation
  • JEDEC standards compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options