MDD(Microdiode Semiconductor) 74LVC1G02GW
| Manufacturer | MDD(Microdiode Semiconductor)Asian Brands |
| MPN | 74LVC1G02GW |
| LCSC Part # | C52953351 |
| Packaging | SOT-353 |
| Customer # | |
| Key Attributes | 1.65V~5.5V 100nA SOT-353 Gates and Inverters RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | MDD(Microdiode Semiconductor) | |
| Packaging | SOT-353 | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 15.9ns@1.65V,30pF;8.6ns@2.3V,30pF;6ns@3V,50pF;3.6ns@4.5V,50pF | |
| Output Logic Level - Low | 100mV;450mV;600mV;700mV;800mV | |
| Input Logic Level - Low | - | |
| Input Logic Level - High | - | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 100nA | |
| Number of Channels | 1;2 | |
| Current - Output High(IOH) | 32mA | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G02 is a single 2-input NOR gate. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. All inputs include Schmitt-trigger action, enabling the circuit to tolerate slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially destructive backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 1.65V to 5.5V
- Input overvoltage tolerance up to 5.5V
- High noise immunity
- CMOS low power consumption
- IOFF circuit for partial power-down mode operation
- Output drive capability ±24mA (at VCC = 3.0V)
- Latch-up performance exceeds 100mA
- Direct TTL-level interface compatible
- Compliant with JEDEC standards: JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8C (2.7V to 3.6V), JESD36 (4.5V to 5.5V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000V; MM JESD22-A115C Class C exceeds 550V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
- Multiple package options
- Single 2-input NOR gate
| Qty | Unit Price | Total Amount |
|---|---|---|
| 10+ | $ 0.0709 | $ 0.71 |
| 100+ | $ 0.0564 | $ 5.64 |
| 300+ | $ 0.0492 | $ 14.76 |
| 3,000+ | $ 0.0437 | $ 131.10 |
| 6,000+ | $ 0.0394 | $ 236.40 |
| 9,000+ | $ 0.0372 | $ 334.80 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | MDD(Microdiode Semiconductor) | |
| Packaging | SOT-353 | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 15.9ns@1.65V,30pF;8.6ns@2.3V,30pF;6ns@3V,50pF;3.6ns@4.5V,50pF | |
| Output Logic Level - Low | 100mV;450mV;600mV;700mV;800mV | |
| Input Logic Level - Low | - | |
| Input Logic Level - High | - | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 100nA | |
| Number of Channels | 1;2 | |
| Current - Output High(IOH) | 32mA | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G02 is a single 2-input NOR gate. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. All inputs include Schmitt-trigger action, enabling the circuit to tolerate slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially destructive backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 1.65V to 5.5V
- Input overvoltage tolerance up to 5.5V
- High noise immunity
- CMOS low power consumption
- IOFF circuit for partial power-down mode operation
- Output drive capability ±24mA (at VCC = 3.0V)
- Latch-up performance exceeds 100mA
- Direct TTL-level interface compatible
- Compliant with JEDEC standards: JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8C (2.7V to 3.6V), JESD36 (4.5V to 5.5V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000V; MM JESD22-A115C Class C exceeds 550V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
- Multiple package options
- Single 2-input NOR gate
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
