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Nanya Tech NT5CC256M16EP-EKRoHS

Manufacturer
Nanya TechAsian Brands
MPN
NT5CC256M16EP-EK
LCSC Part #
C2846880
Packaging
VFBGA-96
Customer #
Key Attributes
DDR3(L) 4Gb SDRAM
Datasheetpdf iconNanya Tech NT5CC256M16EP-EK

Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory (ICs)
ManufacturerNanya Tech
PackagingVFBGA-96
Refresh Current-
Voltage - Supply1.35V
Memory Size4Gbit
Operating temperature0℃~+95℃
Clock Frequency933MHz
FeaturesAuto self-refresh;Auto precharge function;Asynchronous reset function;Data mask function;Write leveling function;Dynamic on-chip termination;ZQ calibration function
Memory FormatDDR3L SDRAM
Current - Supply-

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

The 4Gb Double-Data-Rate-3 (DDR3(L)) DRAM is a high-speed CMOS SDRAM containing 4,294,967,296 bits. It is internally configured as an octal-bank DRAM. The 4Gb chip is organized as 64Mbit × 8 I/O ×8 banks and 32Mbit ×16 I/O ×8 banks. These synchronous devices achieve high speed double-data-rate transfer rates of up to 2133 Mb/sec/pin for general applications. The chip is designed to comply with all key DDR3(L) DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK (overline) falling). All I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchronous fashion. These devices operate with a single 1.5V±0.075V or 1.35V -0.067V/+0.1V power supply and are available in BGA packages.

Features

AI Translation
  • JEDEC DDR3 Compliant
    • 8n Prefetch Architecture - Differential Clock(CK/CK(overline)) and Data Strobe(DQS/DQS(overline)) - Double-data rate on DQs, DQS and DM
  • Data Integrity
    • Auto Self Refresh (ASR) by DRAM built-in TS - Auto Refresh and Self Refresh Modes
    • Power Down Mode
  • Signal Integrity
    • Configurable DS for system compatibility
    • Configurable On-Die Termination
    • ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (240 ohm ±1%)
    • Signal Synchronization
      • Write Leveling via MR settings
      • Read Leveling via MPR
    • Interface and Power Supply
      • SSTL_15 for DDR3:VDD/VDDQ=1.5V(±0.075V)
      • SSTL_1.35 for DDR3L:VDD/VDDQ=1.35V(-0.067/+0.1V)
  • Options
    • Speed Grade (CL-TRCD-TRP)
      • 2133 Mbps / 14-14-14
      • 1866 Mbps / 13-13-13
      • 1600 Mbps / 11-11-11
    • Temperature Range (Tc(overline))
      • Commercial Grade = 0℃ ~ 95℃
  • Programmable Functions
    • CAS Latency (5/6/7/8/9/10/11/12/13/14)
    • CAS Write Latency (5/6/7/8/9/10)
    • Additive Latency (0/CL-1/CL-2)
    • Write Recovery Time (5/6/7/8/10/12/14/16)
    • Burst Type (Sequential/Interleaved)
    • Burst Length (BL8/BC4/BC4 or 8 on the fly)
    • Self Refresh Temperature Range(Normal/Extended)
    • Output Driver Impedance (34/40)
    • On-Die Termination of Rtt_Nom(20/30/40/60/120)
    • On-Die Termination of Rtt_WR(60/120)
    • Precharge Power Down (slow/fast)
In-Stock: 367
367 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 17.3922$ 17.39
10+$ 15.5935$ 155.94
30+$ 14.4965$ 434.90
100+$ 12.6394$ 1263.94
Standard Packaging2000/Full Reel
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