micron MT53E1G32D2FW-046 AAT:B

Manufacturer	micron
MPN	MT53E1G32D2FW-046 AAT:B
LCSC Part #	C5128623
Packaging	TFBGA-200(10x14.5)
Customer #
Key Attributes	32Gbit 1.06V~1.17V 2.133GHz LPDDR4X SDRAM TFBGA-200(10x14.5) Memory (ICs) RoHS
Datasheet	micron MT53E1G32D2FW-046 AAT:B

Products Specifications

Type	Description	All
Category	Integrated Circuits (ICs)/Memory/Memory (ICs)
Manufacturer	micron
Packaging	TFBGA-200(10x14.5)
Refresh Current	4mA
Memory Size	32Gbit
Voltage - Supply	1.06V~1.17V
Operating temperature	-40℃~+105℃
Clock Frequency	2.133GHz
Features	Auto self-refresh;Built-in temperature sensor;Auto precharge function;Write leveling function;ZQ calibration function
Memory Format	LPDDR4X SDRAM
Current - Supply	1.5mA

AI Translation

Ultra-low-voltage core and I/O power supplies - VDD1 = 1.70 - 1.95V; 1.80V nominal - VDD2 = 1.06 - 1.17V; 1.10V nominal - VDDQ = 0.57 - 0.65V; 0.60V nominal or VDDQ = 1.06–1.17V; 1.10V nominal
Frequency range – 2133 – 10 MHz (data rate range per pin: 4266 – 20 Mb/s)
16n prefetch DDR architecture
8 internal banks per channel for concurrent operation
Single-data-rate CMD/ADR entry
Bidirectional/differential data strobe per byte lane
Programmable READ and WRITE latencies (RL/WL)
Programmable and on-the-fly burst lengths (BL = 16, 32)
Directed per-bank refresh for concurrent bank operation and ease of command scheduling
Up to 8.5 GB/s per die x16 channel
On-chip temperature sensor to control self refresh rate
Partial-array self refresh (PASR)
Selectable output drive strength (DS)
Clock-stop capability
RoHS-compliant, “green” packaging
Programmable VSS (ODT) termination
Single-ended CK and DQS support

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Qty	Unit Price(Reference Only)	Total Amount
1+	$ 25.8986	$ 25.90
Standard Packaging1360/Full Tray

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Type	Description	All
Category	Integrated Circuits (ICs)/Memory/Memory (ICs)
Manufacturer	micron
Packaging	TFBGA-200(10x14.5)
Refresh Current	4mA
Memory Size	32Gbit
Voltage - Supply	1.06V~1.17V
Operating temperature	-40℃~+105℃
Clock Frequency	2.133GHz
Features	Auto self-refresh;Built-in temperature sensor;Auto precharge function;Write leveling function;ZQ calibration function
Memory Format	LPDDR4X SDRAM
Current - Supply	1.5mA

AI Translation

Ultra-low-voltage core and I/O power supplies - VDD1 = 1.70 - 1.95V; 1.80V nominal - VDD2 = 1.06 - 1.17V; 1.10V nominal - VDDQ = 0.57 - 0.65V; 0.60V nominal or VDDQ = 1.06–1.17V; 1.10V nominal
Frequency range – 2133 – 10 MHz (data rate range per pin: 4266 – 20 Mb/s)
16n prefetch DDR architecture
8 internal banks per channel for concurrent operation
Single-data-rate CMD/ADR entry
Bidirectional/differential data strobe per byte lane
Programmable READ and WRITE latencies (RL/WL)
Programmable and on-the-fly burst lengths (BL = 16, 32)
Directed per-bank refresh for concurrent bank operation and ease of command scheduling
Up to 8.5 GB/s per die x16 channel
On-chip temperature sensor to control self refresh rate
Partial-array self refresh (PASR)
Selectable output drive strength (DS)
Clock-stop capability
RoHS-compliant, “green” packaging
Programmable VSS (ODT) termination
Single-ended CK and DQS support