Infineon/CYPRESS CY7B995AXI
| Manufacturer | |
| MPN | CY7B995AXI |
| LCSC Part # | C3613081 |
| Packaging | TQFP-44(10x10) |
| Customer # | |
| Key Attributes | TQFP-44(10x10) Clock Generators, PLLs, Frequency Synthesizers RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Infineon/CYPRESS | |
| Packaging | TQFP-44(10x10) | |
| Features | Built-in phase-locked loop;Spread spectrum;Output synchronization and phase alignment;Embedded phase synchronization system (PPS) |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 160 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CY7B995 RoboClock is a low voltage, low power, eight-output, 200 MHz clock driver. It features output phase programmability which is necessary to optimize the timing of high performance computer and communication systems. The user can program both the frequency and the phase of the output banks through nF[0:1] and DS[0:1] pins. The adjustable phase feature allows the user to skew the outputs to lead or lag the reference clock. Any one of the outputs can be connected to feedback to achieve different reference frequency multiplication, and divide ratios and zero input-output delay. The device also features split output bank power supplies, which enable the user to run two banks (1Qn and 2Qn) at a power supply level, different from that of the other two banks (3Qn and 4Qn). The three-level PE/HD pin also controls the synchronization of the output signals to either the rising, or the falling edge of the reference clock and selects the drive strength of the output buffers. The high drive option (PE/HD = MiD) increases the output current from ± 12 mA to ± 24 mA.
Features
- 2.5 V or 3.3 V operation
- Split output bank power supplies
- Output frequency range: 6 MHz to 200 MHz
- 45 ps typical cycle-cycle jitter
- ±2% max output duty cycle
- Selectable output drive strength
- Selectable positive or negative edge synchronization
- Eight LVTTL outputs driving 50 Ω terminated lines
- LVCMOS/LVTTL over-voltage tolerant reference input
- Selectable phase-locked loop (PLL) frequency range and lock indicator
- Phase adjustments in 625/1250 ps steps up to ± 7.5 ns
- (1 - 6, 8, 10, 12) x multiply and (1/2,1/4) x divide ratios
- Spread-Spectrum compatible
- Power down mode
- Selectable reference divider
- Industrial temperature range: -40 °C to +85 °C
- 44-pin TQFP package
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

