SILICON LABS 569AAAA000118ABGR

The Si569 Ultra Series voltage-controlled crystal oscillator utilizes Silicon Laboratories’ advanced 4th generation DSPLL technology to provide an ultra-low jitter, low phase noise clock at any output frequency. The device is user-programmed via simple I2C commands to provide any frequency from 0.2 to 3000 MHz with <1 ppb resolution and maintains exceptionally low jitter for both integer and fractional frequencies across its operating range. On-chip power supply filtering provides industry-leading power supply noise rejection, simplifying the task of generating low jitter clocks in noisy systems that use switched-mode power supplies. Unlike a traditional XO, where a different crystal is required for each output frequency, the Si569 uses one simple crystal and a DSPLL IC-based approach to provide the desired output frequency. The Si569 is factory-configurable for a wide variety of user specifications, including startup frequency, I2C address, output format, and OE pin location/polarity. Specific configurations are factory-programmed at time of shipment, eliminating long lead times associated with custom oscillators.

• I2C programmable to any frequency from 0.2 to 3000 MHz with < 1 ppb resolution
• Ultra low jitter: 100 fs RMS Typ (12 kHz - 20 MHz)
• Configure up to 2 pin-selectable startup frequencies
• I2C interface supports 100 kbps, 400 kbps, and 1 Mbps (Fast Mode Plus)
• Excellent PSNR and supply noise immunity: -80 dBc Typ
• Programmable Kv (ppm/V) simplifies development
• 3.3 V, 2.5 V and 1.8 VDD supply operation from the same part number
• LVPECL, LVDS, CML, HCSL, CMOS, and Dual CMOS output options
• 2.5 x 3.2, 3.2x5, 5x7 mm package options
• Samples available with 1-2 week lead times

• 100G/200G/400G OTN, coherent optics, PAM4
• 3G-SDI/12G-SDI/24G-SDI broadcast video
• Servers, switches, storage, search acceleration
• FPGA/ASIC clocking