TI DS280DF810ABVR

The DS280DF810 is an eight-channel multi-rate retimer with integrated signal conditioning. This device is used to extend the length and enhance the stability of long-distance high-speed serial links that are lossy and subject to crosstalk, while achieving a bit error rate (BER) of no higher than 10⁻¹⁵. The serial data rate of each channel of the DS280DF810 can be independently locked within a continuous range from 20.2 Gbps to 28.4 Gbps or any supported sub-rate (half and quarter of the rate), including critical data rates such as 10.1376 Gbps, 10.3125 Gbps, and 12.5 Gbps. Therefore, the device supports independent channel forward error correction (FEC) pass-through. Physical AC coupling capacitors (TX and RX) are integrated on the printed circuit board (PCB), eliminating the need for external capacitors. The DS280DF810 has a single power supply and minimizes the need for external components. These features reduce the complexity of PCB routing and save BOM costs. The advanced equalization features of the DS280DF810 include: a low-jitter 3-tap transmit finite impulse response (FIR) filter, an adaptive continuous-time linear equalizer (CTLE), and an adaptive decision feedback equalizer (DFE). It supports extension for lossy interconnects and backplanes with multiple connectors and crosstalk. The integrated clock and data recovery (CDR) function resets the jitter budget and retimes high-speed serial data, making it ideal for front-port optical module applications. The DS280DF810 uses a 2×2 cross-point for each channel pair, providing both channel crossing and fan-out options for the host simultaneously. The DS280DF810 can be configured via SMBus or an external EEPROM. A single EEPROM can be shared by up to 16 devices. The non-destructive on-chip eye diagram monitor, along with the PRBS generator and checker, supports in-system diagnostics.

• 8-channel multi-rate retimer with integrated signal conditioning
• All channels independently lockable from 20.2Gbps to 28.4Gbps (including sub-rates such as 10.1376Gbps, 10.3125Gbps, 12.5Gbps)
• Ultra-low latency: typical latency < 500ps at 28.4Gbps data rate
• Single supply, no low-jitter reference clock required; integrated AC coupling capacitors reduce PCB routing complexity and BOM cost
• Integrated 2×2 crosspoint
• Adaptive continuous time linear equalizer (CTLE)
• Adaptive decision feedback equalizer (DFE)
• Low-jitter transmitter with 3-tap FIR filter
• Combined equalization supporting >35dB channel loss at 12.9GHz; >30dB channel loss at 14GHz
• Adjustable transmit amplitude: 205 mVppd to 1225 mVppd (typical)
• On-chip eye opening monitor (EOM), PRBS pattern checker/generator

• Extended backplane and midplane reach
• Jitter attenuation for front-panel optical modules
• IEEE 802.3bj 100GbE, Enhanced Data Rate (EDR), and OIF-CEI-25G-LR/MR/SR/VSR electrical interfaces
• SFP28, QSFP28, CFP2/CFP4, CDFP