NUVOTON NUC131LC2AE

The NuMicro NUC131 series is a 32-bit microcontroller with an embedded ARM Cortex™-M0 core, operating at up to 50MHz. It features 36KB/68KB Flash, 8KB SRAM, and a 4KB LDROM for storing upgrade code. The series also offers a rich set of peripheral interfaces, including: timers, watchdog, windowed watchdog, UART, SPI, I2C, PWM, GPIO, LIN bus, CAN bus, 800KSPS high-speed 12-bit ADC, low-voltage reset, and brown-out detection.

• ARM Cortex™-M0 core up to 50 MHz
• One 24-bit system tick timer supporting low-power power-down mode
• Single-cycle 32-bit hardware multiplier
• Nested Vectored Interrupt Controller (NVIC) supporting 32 interrupt sources with 4 priority levels each
• Serial debug interface supporting 2 watchpoints/4 breakpoints
• Built-in LDO supporting wide voltage operation from 2.5V to 5.5V
• 36K/68K bytes flash for program code storage, 4K bytes flash for ISP boot code storage
• Supports ISP and IAP code updates
• Supports 512-byte page erase
• Supports 2-wire ICP programming via SWD/ICE interface
• Supports external programmer parallel high-speed programming mode
• 8K bytes embedded SRAM
• Flexible clock source selection for different applications
• Built-in 22.1184 MHz high-speed oscillator for system operation
  • Accuracy ±1% (at +25℃, VDD=5V)
  • Accuracy ±3% (at -40℃ ~ +105℃, VDD=2.5V~5.5V)
• Built-in 10 kHz low-speed oscillator for watchdog and power-down wake-up functions
• Supports one PLL output up to 200MHz; BPWM/PWM clock frequency up to 100MHz; system operating frequency up to 50MHz
• External 4~24 MHz high-speed crystal for precise timing operations
• Four I/O modes: quasi-bidirectional, push-pull output, open-drain output, high-impedance input
• Configurable TTL/Schmitt trigger input
• I/O pins configurable as edge/level-triggered interrupt sources
• Supports 4 groups of 32-bit timers, each with a 24-bit up-counter and an 8-bit prescaler
• Each timer has an independent clock source
• Supports one-shot, periodic, toggle, and continuous counting operation modes
• Supports event counting
• Supports input capture
• Multiple clock source options: system clock (HCLK), internal 10 kHz oscillator (LIRC)
• 8 selectable time-out periods from 1.6 ms ~ 26 s (depending on clock source selection)
• Can be used as wake-up source from power-down or idle mode
• Watchdog overflow event can trigger interrupt or chip reset
• 6-bit down-counter with 11-bit prescaler for wide-range window selection
• Supports clock frequency up to 100MHz
• Supports two groups of BPWM, each with a 16-bit counter and 6 output channels
• Supports BPWM output/capture input independent mode
• Supports 12-bit prescaler from 1 to 4096
• Supports BPWM counter 16-bit resolution up, down, and up-down counting modes
• Each BPWM pin supports mask function and tri-state enable
• Supports the following event interrupts: BPWM counter value equals 0, period value, or compare value
• Supports the following events to trigger ADC conversion: BPWM counter value equals 0, period value, or compare value
• Supports 12 capture input channels with 16-bit resolution
• Supports rising-edge, falling-edge, and both-edge capture conditions
• Supports rising-edge, falling-edge, and both-edge input capture interrupts
• Supports rising-edge, falling-edge, and both-edge capture counter reload options
• Supports brake function
• Supports the following event interrupts: PWM counter value equals 0, period value, or compare value
• Supports the following events to trigger ADC conversion: PWM counter value equals 0, period value, or compare value
• Supports 16 capture input channels with 16-bit resolution
• Supports rising-edge, falling-edge, and both-edge capture conditions
• Supports rising-edge, falling-edge, and both-edge input capture interrupts
• Supports rising-edge, falling-edge, and both-edge capture counter reload options
• Up to 6 UART controllers
• UART0 and UART1 with flow control (TXD, RXD, nCTS, and nRTS)
• UART0, UART1, and UART2 with 16-byte FIFO buffer
• Supports IrDA (SIR) and LIN functions
• Supports RS-485 9-bit mode and direction control
• Supports auto baud rate generator
• 1 SPI controller
• Supports SPI master/slave mode
• Full-duplex synchronous serial data transfer
• Configurable transfer data length of 8 to 32 bits
• MSB or LSB first data transfer
• Data transmit and receive on rising or falling clock edge
• Independently configurable
• Supports byte sleep in 32-bit transfer mode
• Supports 3-wire, slave-select-free, bidirectional interface
• Up to 2 groups of I2C controllers
• Supports master/slave mode
• Bidirectional data transfer between master and slave
• Multi-master bus arbitration (no central master) to prevent conflicts when multiple masters transmit simultaneously
• Serial clock synchronization mechanism for synchronizing various serial clocks between devices on a single bus
• Can be used as a handshaking mechanism to control data transfer on the bus
• Programmable clock for various baud rate control
• Supports multiple address recognition (4 slave addresses with mask function)
• Supports wake-up function
• Supports one CAN device
• Supports CAN protocol 2.0 A and B
• Bit rate up to 1M
• 32 message objects
• Each message object has its own identifier mask
• Programmable FIFO mode (message concatenation)
• Maskable interrupts
• Automatic retransmission disabled mode for time-triggered CAN applications
• Supports power-down wake-up system function
• 12-bit SAR ADC up to 800KSPS
• Up to 8-channel single-ended input or 4-channel differential input
• Supports single/single-cycle scan/continuous scan mode
• Independent conversion result register for each channel
• Scans only enabled channels
• Threshold voltage detection
• ADC conversion triggered by software or external input
• 96-bit unique ID (UID)
• 128-bit unique customer ID (UCID)
• Brown-out detection with 4 levels: 4.4 V/3.7 V/2.7 V/2.2 V
• Supports brown-out interrupt or reset function
• Low voltage reset threshold: 2.0 V
• Operating temperature: -40℃ ~ 105℃
• Package: lead-free (RoHS)
• LQFP 64-pin / 48-pin