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TI SN74ALVC164245DLRRoHS

Manufacturer
MPN
SN74ALVC164245DLR
LCSC Part #
C9364
Packaging
SSOP-48-300mil
Customer #
Key Attributes
16-BIT LEVEL-SHIFTING TRANSCEIVER WITH 3-STATE OUTPUTS
Datasheetpdf iconTI SN74ALVC164245DLR
In-Stock: 3,470
3,470 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 1.5537$ 1.55
10+$ 1.3141$ 13.14
30+$ 1.182$ 35.46
100+$ 0.9293$ 92.93
500+$ 0.8625$ 431.25
1,000+$ 0.8315$ 831.50
Standard Packaging1000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Translators, Level Shifters
ManufacturerTI
PackagingSSOP-48-300mil
output typeTri-State
Operating Temperature-40℃~+85℃
Channel TypeBidirectional
Number of Elements2
FeaturesOutput enable high-impedance
Voltage - Supply2.3V~3.6V;3V~5.5V
Number of Circuits8

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging1000
Sales UnitPiece

Introduction

AI Translation

This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has VCCB which is set to operate at 3.3V and 5V. A port has VCCA which is set to operate at 2.5V and 3.3V. This allows for translation from a 2.5 - V to a 3.3 - V environment, and vice versa, or from a 3.3 - V to a 5 - V environment, and vice versa.

The SN74ALVC164245 is designed for asynchronous communication between data buses. The control circuitry (1DIR,2DIR,1OE,and 2OE) is powered by VCC.

To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

Features

AI Translation
  • Member of the Texas Instruments Widebus Family
  • Max tpd of 5.8 ns at 3.3V
  • ±24 - mA Output Drive at 3.3V
  • Control Inputs VH/VL Levels Are Referenced to VCCA Voltage
  • Latch-Up Performance Exceeds 250 mA Per JESD 17