onsemi NB7V33MMNG

The NB7V33M is a differential ÷4 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50 Ω termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V33M produces a ÷4 output copy of an input Clock operating up to 10 GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon powerup, the internal flip flops will attain a random state; the Reset allows for the synchronization of multiple NB7V33M’s in a system. The 16 mA differential CML output provides matching internal 50 Ω termination which guarantees 400 mV output swing when externally receiver terminated with 50 Ω to VCC. The NB7V33M is the ÷4 version of the NB7V32M (÷2) and is offered in a low profile 3 mm×3 mm 16 -pin QFN package.

• Maximum Input Clock Frequency >10 GHz, typical
• 260 ps Typical Propagation Delay
• 35 ps Typical Rise and Fall Times
• Differential CML Outputs, 400 mV Peak−to−Peak, typical
• Operating Range: VCC = 1.71 V to 2.625 V with GND = 0 V
• Internal 50 Ω Input Termination Resistors
• Random Clock Jitter <0.8 ps RMS
• QFN−16 Package, 3 mm×3 mm
• -40℃ to +85℃ Ambient Operating Temperature
• These are Pb−Free Devices