TI TLC556MDR

The TLC556 series is a monolithic timing circuit fabricated using TI's LinCMOS process. This process offers full compatibility with CMOS, TTL, and MOS logic and can operate at frequencies up to 2 MHz. Due to the high input impedance, smaller and less expensive timing capacitors than those of the NE556 can be used to achieve precise time delays and oscillations. Power consumption is low across the entire supply voltage range. Similar to the NE556, the trigger level of the TLC556 is approximately one-third of the supply voltage, and the threshold level is about two-thirds of the supply voltage. These levels can be changed via the control voltage terminal. When the trigger input is below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset, and the output goes low. The reset input can override all other inputs and can be used to initiate a new timing cycle. If the reset input is low, the flip-flop will be reset, and the output will be low. Whenever the output is low, a low-impedance path is provided between the discharge terminal and ground. Although the CMOS output can sink more than 100 mA of current and source more than 10 mA of current, the TLC556 exhibits significantly reduced supply current spikes during output transitions. This reduces the need for the large decoupling capacitors required by the NE556. These devices feature internal electrostatic discharge (ESD) protection circuits that prevent catastrophic failure at voltages up to 2000 V, as shown by the MIL-STD-883C Method 3015 test. However, care should be taken when handling these devices because exposure to ESD may cause degradation of the device's parameter performance. All unused inputs should be connected to an appropriate logic level to prevent false triggering.