TI TLC556IDR

The TLC556 series is a monolithic timing circuit manufactured using TI's LinCMOS process. This process provides full compatibility with CMOS, TTL, and MOS logic and can operate at frequencies up to 2 MHz. Due to the high input impedance, smaller and lower-cost timing capacitors can be used to achieve precise time delays and oscillations. Power consumption is low over the entire power supply voltage range. Similar to the NE556, the trigger level of the TLC556 is approximately one-third of the power supply voltage, and the threshold level is approximately two-thirds of the power supply voltage. These levels can be changed via the control voltage terminal. When the trigger input is below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset, and the output is low. The reset input can override all other inputs and can be used to start a new timing cycle. If the reset input is low, the flip-flop is reset, and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge terminal and ground. Although the CMOS output can sink more than 100 mA of current and source more than 10 mA of current, the TLC556 exhibits significantly reduced power supply current spikes during output transitions. This reduces the need for the large decoupling capacitors required by the NE556. These devices have internal electrostatic discharge (ESD) protection circuits that can prevent catastrophic failures at voltages up to 2000 V, as shown by testing in accordance with MIL-STD-883C Method 3015. However, care should be taken when handling these devices because exposure to ESD may cause degradation of device parameter performance. All unused inputs should be connected to an appropriate logic level to prevent false triggering.