ST M74HC595YRM13TR

The M74HC595 device is a high speed CMOS 8-bit shift register with output latches (3-state) fabricated with silicon gate C2MOS technology. This device contains an 8-bit serial in, parallel out shift register that feeds an 8-bit D-type storage register. The storage register has 8 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has direct overriding clear, serial input, and serial output (standard) pins for cascading. Both the shift register and storage register use positive edge triggered clocks. If both clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

• High speed: f(MAX) = 59 MHz (typ.) at V(CC) = 6 V
• Low power dissipation: I(CC) = 4 μA (max.) at T(A) = 25℃
• High noise immunity: V(NIH) = V(NIL) = 28% V(CC) (min.)
• Symmetrical output impedance: - ||(OH) = |(OL) = 6 mA (min.) for QA to QH; - ||(OH) = |(OL) = 4 mA (min.) for QH'
• Balanced propagation delays: t(PLH) ≅ t(PHL)
• Wide operating voltage range: V(CC) (opr.) = 2 V to 6 V
• Pin and function compatible with 74 series 595
• ESD performance
  • HBM: 2 kV
  • MM: 200 V
  • CDM: 1 kV

• Automotive
• Industrial
• Computer
• Consumer