TI CD74HCT175M96
| Manufacturer | |
| MPN | CD74HCT175M96 |
| LCSC Part # | C8137 |
| Packaging | SOIC-16 |
| Customer # | |
| Key Attributes | High-Speed CMOS Logic Quad D-Type Flip-Flop with Reset |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | SOIC-16 | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 4 | |
| Output Type | Complementary type | |
| Operating Temperature | -55℃~+125℃ | |
| Series | 74HCT Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 4mA | |
| Current - Output Low(IOL) | 4mA | |
| Setup Time | 20ns | |
| Quiescent Current | 8uA | |
| Hold Time | 5ns | |
| Propagation Delay | 33ns@4.5V,50pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 'HC175 and 'HCT175 are high speed Quad D- type Flip- Flops with individual D- inputs and Q, Q complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices. Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse. All four Flip- Flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q outputs to a logic 1.
Features
- Common Clock and Asynchronous Reset on Four D- Type Flip- Flops
- Positive Edge Pulse Triggering
- Complementary Outputs
- Buffered Inputs
- Fanout (Over Temperature Range):
- Standard Outputs: 10 LSTTL Loads
- Bus Driver Outputs: 15 LSTTL Loads
- Wide Operating Temperature Range: -55℃ to 125℃
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types:
- 2V to 6V Operation
- High Noise Immunity: Nₗₗ = 30%, Nₕₕ = 30% of VCC at VCC = 5V
- HCT Types:
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, Vₗₗ = 0.8V (Max), Vₕₕ = 2V (Min)
- CMOS Input Compatibility, Iₗₗ ≤ 1μA at VOL, VOH
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.3251 | $ 1.63 |
| 50+ | $ 0.2586 | $ 12.93 |
| 150+ | $ 0.2262 | $ 33.93 |
| 500+ | $ 0.1973 | $ 98.65 |
| 2,500+ | $ 0.1893 | $ 473.25 |
| 5,000+ | $ 0.1845 | $ 922.50 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | SOIC-16 | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 4 | |
| Output Type | Complementary type | |
| Operating Temperature | -55℃~+125℃ | |
| Series | 74HCT Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 4mA | |
| Current - Output Low(IOL) | 4mA | |
| Setup Time | 20ns | |
| Quiescent Current | 8uA | |
| Hold Time | 5ns | |
| Propagation Delay | 33ns@4.5V,50pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 'HC175 and 'HCT175 are high speed Quad D- type Flip- Flops with individual D- inputs and Q, Q complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices. Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse. All four Flip- Flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q outputs to a logic 1.
Features
- Common Clock and Asynchronous Reset on Four D- Type Flip- Flops
- Positive Edge Pulse Triggering
- Complementary Outputs
- Buffered Inputs
- Fanout (Over Temperature Range):
- Standard Outputs: 10 LSTTL Loads
- Bus Driver Outputs: 15 LSTTL Loads
- Wide Operating Temperature Range: -55℃ to 125℃
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types:
- 2V to 6V Operation
- High Noise Immunity: Nₗₗ = 30%, Nₕₕ = 30% of VCC at VCC = 5V
- HCT Types:
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, Vₗₗ = 0.8V (Max), Vₕₕ = 2V (Min)
- CMOS Input Compatibility, Iₗₗ ≤ 1μA at VOL, VOH
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



