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TI CD74HCT175M96RoHS

Manufacturer
MPN
CD74HCT175M96
LCSC Part #
C8137
Packaging
SOIC-16
Customer #
Key Attributes
High-Speed CMOS Logic Quad D-Type Flip-Flop with Reset
Datasheetpdf iconTI CD74HCT175M96
In-Stock: 1,985
1,985 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
5+$ 0.3251$ 1.63
50+$ 0.2586$ 12.93
150+$ 0.2262$ 33.93
500+$ 0.1973$ 98.65
2,500+$ 0.1893$ 473.25
5,000+$ 0.1845$ 922.50
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Flip Flops
ManufacturerTI
PackagingSOIC-16
Voltage - Supply4.5V~5.5V
Number of Bits per Element4
Output TypeComplementary type
Operating Temperature-55℃~+125℃
Series74HCT Series
Synchronous/AsynchronousAsynchronous
Number of Elements1
Current - Output High(IOH)4mA
Current - Output Low(IOL)4mA
Setup Time20ns
Quiescent Current8uA
Hold Time5ns
Propagation Delay33ns@4.5V,50pF
Trigger TypeRising Edge

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The 'HC175 and 'HCT175 are high speed Quad D- type Flip- Flops with individual D- inputs and Q, Q complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices. Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse. All four Flip- Flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q outputs to a logic 1.

Features

AI Translation
  • Common Clock and Asynchronous Reset on Four D- Type Flip- Flops
  • Positive Edge Pulse Triggering
  • Complementary Outputs
  • Buffered Inputs
  • Fanout (Over Temperature Range):
    • Standard Outputs: 10 LSTTL Loads
    • Bus Driver Outputs: 15 LSTTL Loads
  • Wide Operating Temperature Range: -55℃ to 125℃
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types:
    • 2V to 6V Operation
    • High Noise Immunity: Nₗₗ = 30%, Nₕₕ = 30% of VCC at VCC = 5V
  • HCT Types:
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, Vₗₗ = 0.8V (Max), Vₕₕ = 2V (Min)
    • CMOS Input Compatibility, Iₗₗ ≤ 1μA at VOL, VOH