SKYWORKS SI5395A-A-GM

The Si5395/94/92 Jitter attenuators combine fourth-generation DSPLL™ and MultiSynth™ technologies to deliver ultra-low jitter (69 fs) for high performance applications like 56G SerDes. They are used in applications that demand the highest level of integration and jitter performance. All PLL components are integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions. Device grades J/K/L/M/E have an integrated reference to save board space, improve system reliability and reduces the effect of acoustic emissions noise caused by temperature ramps. Grades A/B/C/D/P use an external crystal (XTAL) or crystal oscillator (XO) reference. The Si5395/94/92 support free-run, synchronous and holdover modes as well as enhanced hitless switching, minimizing the phase transients associated when switching between input clocks. These devices are programmable via a serial interface with in-circuit programmable non-volatile memory (NVM) so they always power up with a known frequency configuration. Programming the Si5395/94/92 is easy with Skyworks’ ClockBuilderTM Pro software. Factory preprogrammed devices are also available.

• Generates any combination of output frequencies from any input frequency
• Ultra low phase jitter:
  • 69 fs RMS (Grade P)
  • 71 fs RMS (Grade E)
  • 85 fs RMS (integer mode)
  • 100 fs RMS (fractional mode)
• Enhanced hitless switching minimizes output phase transients (0.2 ns typ)
• Input frequency range:
  • Differential: 8 kHz to 750 MHz
  • LVCMOS: 8 kHz to 250 MHz
• Output frequency range:
  • Differential: 100 Hz to 1028 MHz
  • LVCMOS: 100 Hz to 250 MHz
• Meets G.8262, E.8262.1 EEC Standards
• Status monitoring
• Si5395: 4 input, 12 output (64-QFN/LGA)
• Si5394: 4 input, 4 output (44-QFN/LGA)
• Si5392: 4 input, 2 output (44-QFN/LGA)
• External reference: Grades A/B/C/D/P
• Integrated reference: Grades J/K/L/M/E
• Drop-in compatible with Si5345/44/42
• Generates any output frequency in any format from any input frequency
• External XTAL or XO reference (A/B/C/D/P)
• Integrated reference (J/K/L/M/E)
• Ultra-low phase jitter of 69 fs (P-Grade)
• Dynamic phase adjust
• Programmable jitter attenuation bandwidth: 0.1 Hz to 4 kHz
• Meets requirements of:
  • ITU-T G.8262 (SyncE) EEC Options 1 and 2
  • ITU-T G.8262.1 (Enhanced SyncE) eEEC
• Highly configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL with programmable signal amplitude
• Status monitoring (LOS, OOF, LOL)
• Enhanced hitless switching for 8 kHz, 19.44 MHz, 25 MHz inputs and other frequencies
• Locks to gapped clock inputs
• Free-run and holdover modes
• Optional zero delay mode
• Fast-lock acquisition for low nominal bandwidths
• Independent Frequency-on-the fly for each MultiSynth
• DCO mode: as low as 0.001 ppb step size
• Core voltage:
  • VDD: 1.8 V ±5%
  • VDDA: 3.3 V ±5%
• Independent output clock supply pins: 3.3 V, 2.5 V, or 1.8 V
• Serial interface: I2C or SPI
• In-circuit programmable with non-volatile OTP memory
• ClockBuilder Pro software simplifies device configuration
• Temperature range: -40 to +85 °C
• Pb-free, RoHS-6 compliant

• 56G/112G PAM4 SerDes clocking
• OTN muxponders and transponders
• 10/40/100/200/400G networking line cards
• 10/40/100/400 GbE Synchronous Ethernet (ITU-T G.8262)
• Medical imaging
• Test and measurement