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EDA ModelsEasyEDA
Connor Winfield SCG2500-77.76M
| Manufacturer | |
| MPN | SCG2500-77.76M |
| LCSC Part # | C7309575 |
| Packaging | SMD-14P |
| Customer # | |
| Key Attributes | 77.76MHz 1 SMD-14P Clock Generators, PLLs, Frequency Synthesizers RoHS |
| Datasheet |  Connor Winfield SCG2500-77.76M |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Connor Winfield | |
| Packaging | SMD-14P | |
| Operating Temperature | 0℃~+70℃ | |
| Output Frequency(Max) | 77.76MHz | |
| Number of Outputs | 1 |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- The SCG2500 is a mixed-signal phase lock loop generating CMOS outputs from an intrinsically low jitter voltage controlled crystal oscillator.
- The SCG2500 can lock to one of two possible input reference frequencies at 8 kHz which is selectable using one input select pin.
- Further features include an alarm output to indicate Loss of Reference, LOR, or Loss of Lock, LOL.
- If only one of the references is lost, the unit will disable its phase detector and will signal an alarm, but will not switch reference automatically.
- If both references are lost, the SCG2500 will enter a Free Run state which will guarantee a 20 ppm accurate output.
- Additionally, the Free Run mode may be entered manually by applying a high signal to the Force Free Run pin.
- If the unit is in Free Run mode, the Free Run status pin will be high.
- All outputs, except the Oscillator Output, may be put into the tri-state high impedance condition for external testing purposes by applying a high signal to the Reset/ Tri-State pin.
- The filtered 8 kHz is derived from the oscillator output.
- The offset between the filtered output and the reference input will change with each reference rearrangement.
- Phase Locked Output
- Frequency Control
- Intrinsically Low Jitter Crystal Oscillator
- Two Selectable References @ 8 kHz
- Alarm Output
- Tri-Statable Alarm Outputs and Reference Output
- Force Free Run Function
- Automatic Free Run Operation upon loss of both references
- Input Duty Cycle Tolerant
- 3.3 Volt Power Supply
- Small Size: 0.78*×0.83*×0.35* maximum
- Surface Mount, DIL Package
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Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | Connor Winfield | |
| Packaging | SMD-14P | |
| Operating Temperature | 0℃~+70℃ | |
| Output Frequency(Max) | 77.76MHz | |
| Number of Outputs | 1 |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- The SCG2500 is a mixed-signal phase lock loop generating CMOS outputs from an intrinsically low jitter voltage controlled crystal oscillator.
- The SCG2500 can lock to one of two possible input reference frequencies at 8 kHz which is selectable using one input select pin.
- Further features include an alarm output to indicate Loss of Reference, LOR, or Loss of Lock, LOL.
- If only one of the references is lost, the unit will disable its phase detector and will signal an alarm, but will not switch reference automatically.
- If both references are lost, the SCG2500 will enter a Free Run state which will guarantee a 20 ppm accurate output.
- Additionally, the Free Run mode may be entered manually by applying a high signal to the Force Free Run pin.
- If the unit is in Free Run mode, the Free Run status pin will be high.
- All outputs, except the Oscillator Output, may be put into the tri-state high impedance condition for external testing purposes by applying a high signal to the Reset/ Tri-State pin.
- The filtered 8 kHz is derived from the oscillator output.
- The offset between the filtered output and the reference input will change with each reference rearrangement.
- Phase Locked Output
- Frequency Control
- Intrinsically Low Jitter Crystal Oscillator
- Two Selectable References @ 8 kHz
- Alarm Output
- Tri-Statable Alarm Outputs and Reference Output
- Force Free Run Function
- Automatic Free Run Operation upon loss of both references
- Input Duty Cycle Tolerant
- 3.3 Volt Power Supply
- Small Size: 0.78*×0.83*×0.35* maximum
- Surface Mount, DIL Package
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |