Rochester Electronics A82370-16
| Manufacturer | |
| MPN | A82370-16 |
| LCSC Part # | C7208792 |
| Packaging | - |
| Customer # | |
| Key Attributes | Memory Controllers RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory Controllers | |
| Manufacturer | Rochester Electronics | |
| Packaging | - | |
| Features | Interrupt generation;Power-up/reset configuration |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 82370 is a multifunction support peripheral that integrates the system functions required in an 80376 environment. It features 8 high-performance 32-bit DMA channels (32-bit internal, 16-bit external), enabling efficient data transfer rates on the 80376 bus. The device integrates system support peripherals including interrupt control, timers, wait-state generation, DRAM refresh control, and system reset logic. Its DMA controller can transfer data between devices of different data path widths using a single channel. Each DMA channel operates independently in multiple modes, and each channel has a temporary data storage register for handling misaligned data, eliminating the need for external alignment logic.
Features
- High-performance 32-bit DMA controller for 16-bit bus
- Maximum data transfer rate of 16 MBytes/Sec at 10 MHz
- 8 independently programmable channels
- 20-source interrupt controller with individually programmable interrupt vectors, 15 external and 5 internal interrupts; superset of 82C59A
- Four 16-bit programmable interval timers, compatible with 82C54
- Software compatible with 82380
- Programmable wait-state generator: 0–15 wait states in pipelined mode, 1–16 wait states in non-pipelined mode
- DRAM refresh controller
- 80376 shutdown detection and reset control with software/hardware reset support
- High-speed CHMOS II technology
- Available in 100-pin plastic QFP and 132-pin PGA packages
- Optimized for use with the 80376 microprocessor; resides on local bus for maximum bus bandwidth at 16 MHz clock frequency
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 386.0819 | $ 386.08 |
| 200+ | $ 362.6077 | $ 72521.54 |
| 500+ | $ 350.491 | $ 175245.50 |
| 1,000+ | $ 344.5044 | $ 344504.40 |
Standard Packaging1/Full Bag | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory Controllers | |
| Manufacturer | Rochester Electronics | |
| Packaging | - | |
| Features | Interrupt generation;Power-up/reset configuration |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 82370 is a multifunction support peripheral that integrates the system functions required in an 80376 environment. It features 8 high-performance 32-bit DMA channels (32-bit internal, 16-bit external), enabling efficient data transfer rates on the 80376 bus. The device integrates system support peripherals including interrupt control, timers, wait-state generation, DRAM refresh control, and system reset logic. Its DMA controller can transfer data between devices of different data path widths using a single channel. Each DMA channel operates independently in multiple modes, and each channel has a temporary data storage register for handling misaligned data, eliminating the need for external alignment logic.
Features
- High-performance 32-bit DMA controller for 16-bit bus
- Maximum data transfer rate of 16 MBytes/Sec at 10 MHz
- 8 independently programmable channels
- 20-source interrupt controller with individually programmable interrupt vectors, 15 external and 5 internal interrupts; superset of 82C59A
- Four 16-bit programmable interval timers, compatible with 82C54
- Software compatible with 82380
- Programmable wait-state generator: 0–15 wait states in pipelined mode, 1–16 wait states in non-pipelined mode
- DRAM refresh controller
- 80376 shutdown detection and reset control with software/hardware reset support
- High-speed CHMOS II technology
- Available in 100-pin plastic QFP and 132-pin PGA packages
- Optimized for use with the 80376 microprocessor; resides on local bus for maximum bus bandwidth at 16 MHz clock frequency
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

