RENESAS 72V2103L15PFG8
| Manufacturer | |
| MPN | 72V2103L15PFG8 |
| LCSC Part # | C7193004 |
| Packaging | TQFP-80(14x14) |
| Customer # | |
| Key Attributes | 10ns 128Kx18 35mA 3.15V~3.45V 66.7MHz TQFP-80(14x14) FIFOs Memory RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/FIFOs Memory | |
| Manufacturer | RENESAS | |
| Packaging | TQFP-80(14x14) | |
| Access Time | 10ns | |
| Memory Size | 128Kx18 | |
| Current - Supply(Max) | 35mA | |
| Voltage - Supply | 3.15V~3.45V | |
| Features | Output enable | |
| Clock Frequency | 66.7MHz | |
| Operating Temperature | 0℃~+70℃ | |
| Function | Synchronous | |
| Bus Directional | Unidirectional | |
| Programmable Flags Support | Yes |
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Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 750 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- Choose among the following memory organizations: 131,072 x 18/262,144 x 9; 262,144 x 18/524,288 x 9
- Functionally compatible with the IDT72V255LA/72V265LA and IDT72V275/72V285 SuperSync FIFOs
- Up to 166 MHz Operation of the Clocks
- User selectable Asynchronous read and/or write ports (BGA Only)
- 6 ns read/write cycle time (4.0 ns access time)
- User selectable input and output port bus-sizing: x9 in to x9 out; x9 in to x18 out; x18 in to x9 out; x18 in to x18 out
- Big-Endian/Little-Endian user selectable byte representation
- 5V tolerant inputs
- Fixed, low first word latency
- Zero latency retransmit
- Auto power down minimizes standby power consumption
- Master Reset clears entire FIFO
- Partial Reset clears data, but retains programmable settings
- Empty, Full and Half-Full flags signal FIFO status
- Programmable Almost-Empty and Almost-Full flags, each flag can default to one of eight preselected offsets
- Selectable synchronous/asynchronous timing modes for Almost-Empty and Almost-Full flags
- Program programmable flags by either serial or parallel means
- Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using 0R (overline) and IR flags)
- Output enable puts data outputs into high impedance state
- Easily expandable in depth and width
- JTAG port, provided for Boundary Scan function (BGA Only)
- Independent Read and Write Clocks (permit reading and writing simultaneously)
- Available in a 80-pin Thin Quad Flat Pack (TQFP) or a 100-pin Ball Grid Array (BGA) (with additional features)
- Pin compatible to the SuperSync II (IDT72V223/72V233/72V243/ 72V253/72V263/72V273/72V283/72V293) family
- High-performance submicron CMOS technology
- Industrial temperature range (-40℃ to +85℃) is available
- Green parts available
Applications
AI Translation
- network
- video
- telecommunications
- data communications
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 276.6215 | $ 276.62 |
| 200+ | $ 110.3744 | $ 22074.88 |
| 750+ | $ 106.6859 | $ 80014.43 |
| 1,500+ | $ 104.8628 | $ 157294.20 |
Standard Packaging750/Full Reel | ||
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Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |

