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FMD(Fremont Micro Devices) FT61F135-TRB product image
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FMD(Fremont Micro Devices) FT61F135-TRBRoHS

Manufacturer
FMD(Fremont Micro Devices)Asian Brands
MPN
FT61F135-TRB
LCSC Part #
C708789
Packaging
TSSOP-20
Customer #
Key Attributes
High-performance RISC CPU microcontroller
Datasheetpdf iconFMD(Fremont Micro Devices) FT61F135-TRB
In-Stock: 2,780
2,780 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 0.4511$ 0.45
10+$ 0.347$ 3.47
30+$ 0.3033$ 9.10
70+$ 0.2475$ 17.33
490+$ 0.2218$ 108.68
980+$ 0.2067$ 202.57
Standard Packaging70/Full Tube
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerFMD(Fremont Micro Devices)
PackagingTSSOP-20
ADC (Bit)12bit
Voltage - Supply1.9V~5.5V
Program Memory TypeFLASH
Program Storage Size3KB
CPU CoreOthers
CPU Maximum Speed16MHz
Number of I/O18
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging70
Sales UnitPiece

Features

AI Translation
  • Only 35 instructions to learn; all instructions are single-cycle (except branch/jump)
  • Memory architecture: Program ROM 3k × 14 bits, Data RAM 256 × 8 bits, Data EEPROM 128 × 8 bits
  • 8-level hardware stack
  • Selectable instruction cycle: 2T/4T
  • 125ns @ 2T, 16MHz, VDD ≥ 2.7V
  • Operating temperature range: -40°C ~ 85°C
  • Wide operating voltage range: 1.9V ~ 5.5V
  • Clock sources: Two internal clocks (13.5M/16M high-speed high-accuracy HIRC with software trimming support, 2.5‰ per step; 32k low-speed low-power LIRC); Crystal oscillator and external clock input, crystal clock missing detection, dual-speed clock startup in crystal clock configuration, slow clock cycle measurement
  • 16-bit watchdog with 7-bit prescaler, selectable clock source
  • Power-on reset delay counter
  • Low-power SLEEP mode; system clock can remain active or be disabled
  • LVR: 2.0V/2.2V/2.5V/2.8V/3.1V/3.6V/4.1V
  • LVD: 1.2V/2.0V/2.4V/2.7V/3.0V/3.3V/3.6V/4.0V or external input voltage
  • ISP and OCD support: 3 hardware breakpoints, soft reset, single-step, pause, step-over, etc.
  • Program ROM partition protection
  • Package options: SOP8, MSOP10, SOP14, SOP16, SOP20, TSSOP20, DIP20
  • 18 general-purpose IOs with independently controlled direction: PORTA, PORTB, PORTC
  • 8 wake-up pins: PORTA
  • 18 pins with open-drain, independently controlled
  • 18 pins with pull-up, independently controlled
  • 18 pins with pull-down, independently controlled
  • ADC input channels: AN0–7
  • 8 programmable source-current pins PC0–1, PB2–7: 3/6/24mA @ 5V
  • 8 programmable sink-current IOs: max 55mA @ 5V
  • Pin alternate function remapping support
  • 1 × 12-bit SAR ADC, 8 external channels + 3 internal reference voltage channels (internal reference: VDD, 0.5V, 2V, 3V; external reference: VREFP, VREFN)
  • Timer0: 8-bit timer with 8-bit prescaler, selectable clock source
  • Timer1: 12-bit timer, selectable clock source
  • Timer2: 16-bit timer with 4-bit prescaler and 4-bit postscaler; internal slow clock measurement; 4 independent PWM channels with individually configurable polarity and duty cycle; 1 complementary PWM output pair with dead-band control, mappable to up to 6 IOs; double-buffered duty cycle and period registers; clock sources: HIRC, crystal clock, 2× HIRC, 2× crystal clock, instruction clock, system clock, LIRC; operable in sleep mode; brake input; Buzzer mode; single-pulse mode