XINLUDA XD74LS85

These 4-bit magnitude comparators are capable of comparing both binary and BCD (8-4-2-1) codes. Three fully decoded decisions are made about two 4-bit words (A, B) and are provided at three outputs. These devices can be fully expanded to any length without external gates. Longer words can be compared by cascading comparators. The A > B, A < B, and A = B outputs of the stage handling the less significant bits are connected to the corresponding A > B, A < B, and A = B inputs of the next stage handling the more significant bits. The stage handling the least significant bits must have a HIGH voltage applied to its A = B input. The 74LS85 cascading path is implemented using only two levels of gate delays to reduce the overall comparison time for long words. An alternative cascading method for further reducing comparison time is shown in the typical application data.