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TI SN74LVTH162244DGGRRoHS

Manufacturer
MPN
SN74LVTH162244DGGR
LCSC Part #
C7043
Packaging
TSSOP-48-6.2mm
Customer #
Key Attributes
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
Datasheetpdf iconTI SN74LVTH162244DGGR
In-Stock: 157
157 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 1.0882$ 1.09
10+$ 1.0638$ 10.64
30+$ 1.046$ 31.38
100+$ 1.0297$ 102.97
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingTSSOP-48-6.2mm
Input type-
Voltage - Supply2.7V~3.6V
Output TypeTri-State
Current - Output High(IOH)12mA
Series74LVTH
Operating Temperature-40℃~+85℃
Current - Output Low(IOL)12mA
Number of Bits per Element4
Channel TypeUnidirectional
FeaturesPower-off isolation;Bus hold;Hot-swap support
Number of Elements4
Propagation Delay3.4ns@3.3V,50pF
Quiescent Current190uA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

The 'LVTH162244 devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE¯) inputs. The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors to reduce overshoot and undershoot. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE¯ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Features

AI Translation
  • Output Ports Have Equivalent 22-Ω Series Resistors, So No External Resistors Are Required
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V Vcc)
  • Support Unregulated Battery Operation Down to 2.7 V
  • Typical VoLP (Output Ground Bounce) < 0.8 V at VCC = 3.3V, TA = 25℃
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Distributed Vcc and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)