Nexperia 74LVC1G86GF/S500,1

The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
• Overvoltage tolerant inputs to 5.5 V
• Complies with JEDEC standard:
  • JESD8-7 (1.65 V to 1.95 V)
  • JESD8-5 (2.3 V to 2.7 V)
  • JESD8C (2.7 V to 3.6 V)
  • JESD36 (4.5 V to 5.5 V)
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power dissipation
• Latch-up performance exceeds 250 mA
• IOFF circuitry provides partial Power-down mode operation
• Direct interface with TTL levels
• ESD protection:
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Multiple package options
• Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

• Mixed 3.3V and 5V environments
• Partial power-down applications
• Direct TTL-level interface
• ESD protection
• Wide supply voltage range
• High noise immunity
• Overvoltage-tolerant inputs
• CMOS low power consumption
• Latch-up performance
• IOFF circuitry for partial power-down mode operation