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SILICON LABS SI1000-E-GM2 product image
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SILICON LABS SI1000-E-GM2RoHS

Manufacturer
MPN
SI1000-E-GM2
LCSC Part #
C6678762
Packaging
LGA-42(5x7)
Customer #
Key Attributes
256Kbps -121dBm 240MHz~960MHz 1.8V~3.6V LGA-42(5x7) RF Transceiver ICs RoHS
Datasheetpdf iconSILICON LABS SI1000-E-GM2
In-Stock: 25
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QtyUnit PriceTotal Amount
1+$ 21.4722$ 21.47
10+$ 20.5162$ 205.16
30+$ 18.8635$ 565.91
100+$ 17.4198$ 1741.98
Standard Packaging364/Full Tray
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Products Specifications

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TypeDescription
CategoryRF and Wireless/RF Transceiver ICs
ManufacturerSILICON LABS
PackagingLGA-42(5x7)
Data Rate256Kbps
Sensitivity-121dBm
Frequency Range240MHz~960MHz
Receive Current18.5mA
Interface TypeI2C;SPI;UART
Output Power20dBm
Operating Temperature-40℃~+85℃
Voltage - Supply1.8V~3.6V
FeaturesCRC check function;Supports software reset;Power-on reset function;Power-off reset function
Current Of Transmitting85mA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging364
Sales UnitPiece

Introduction

AI Translation

Ultra-low power: Operating voltage 0.9 to 3.6 V. Typical sleep mode current < 0.1 μA, retaining state and RAM contents across the full supply range; wake-up time < 2 μs. RTC operating current less than 600 nA, less than 1 μA with RTC running and radio state retained. On-chip DC-DC converter allows operation down to 0.9 V. Two integrated brown-out detectors covering both sleep and active modes. 10-bit ADC: Up to 300 ksps, up to 18 external inputs, supports external pin or internal VREF (no external capacitor required), integrated temperature sensor, optional external conversion start input, autonomous burst mode with 16-bit automatic averaging accumulator. Dual comparators: Programmable hysteresis and response time, configurable as interrupt or reset source, low current (< 0.5 μA). On-chip debug: On-chip debug circuitry supports full-speed, non-intrusive in-system debugging (no emulator required), with breakpoints and single-step execution, inspect/modify memory and registers, complete development kit included. High-speed 8051 μC core: Pipelined instruction architecture, 70% of instructions execute in 1 or 2 system clocks, up to 25 MIPS throughput at 25 MHz clock, extended interrupt handler. Memory: 4352 bytes internal data RAM (256 + 4096), 64 kB (Si1000/2/4) or 32 kB (Si1001/3/5) flash; in-system programmable in 1024-byte sectors, 1024 bytes reserved in 64 kB devices. EZRadioPRO transceiver: Frequency range = 240–960 MHz, sensitivity = -121 dBm, FSK, GFSK, and OOK modulation, maximum output power = +20 dBm (Si1000/1), +13 dBm (Si1002/3/4/5), RF current consumption: 18.5 mA RX, 18 mA TX at +1 dBm, 30 mA TX at +13 dBm, 85 mA TX at +20 dBm, data rate = 0.123 to 256 kbps, automatic frequency calibration (AFC), antenna diversity and TX/RX switch control, programmable packet handler, 64-byte TX and RX FIFOs, frequency hopping capability, on-chip crystal tuning. Digital peripherals: 19 or 16 port I/O plus 3 GPIO pins; hardware-enhanced UART, SPI, and I²C serial ports available simultaneously, low-power 32-bit SmaRTClock, four general-purpose 16-bit counter/timers, six-channel programmable counter array (PCA). Clock sources: Precision internal oscillator: 24.5 MHz, ±2% accuracy, UART operation supported; spread-spectrum mode for reduced EMI; low-power 20 MHz internal oscillator. External oscillator: crystal, RC, C, CMOS clock. SmaRTClock oscillator: 32.768 kHz crystal or self-oscillating. Real-time switching between clock sources to facilitate various power-saving modes. Package: 42-pin LGA (5 × 7 mm), temperature range: -40 to +85°C.