ADI ADSP-BF526BBCZ-3A

The ADSP-BF52x processors are members of the Blackfin family of products, incorporating the Analog Devices/Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The ADSP-BF52x processors are completely code compatible with other Blackfin processors. The ADSP-BF523/ADSP-BF525/ADSP-BF527 processors offer performance up to 600 MHz. The ADSP-BF522/ADSP-BF524/ADSP-BF526 processors offer performance up to 400 MHz and reduced static power consumption.

• Up to 600 MHz high performance Blackfin processor
• Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter
• RISC-like register and instruction model for ease of programming and compiler-friendly support
• Advanced debug, trace, and performance monitoring
• Accepts a wide range of supply voltages for internal and I/O operations
• Programmable on-chip voltage regulator (ADSP-BF523/ADSP-BF525/ADSP-BF527 processors only)
• Qualified for Automotive Applications
• 289-ball and 208-ball CSP_BGA packages
• 132K bytes of on-chip memory
• External memory controller with glueless support for SDRAM and asynchronous 8-bit and 16-bit memories
• Flexible booting options from external flash, SPI, and TWI memory or from host devices including SPI, TWI, and UART
• Code security with Lockbox Secure Technology one-time-programmable (OTP) memory
• Memory management unit providing memory protection
• USB 2.0 high speed on-the-go (OTG) with integrated PHY
• IEEE 802.3-compliant 10/100 Ethernet MAC
• Parallel peripheral interface (PPI), supporting ITU-R 656 video data formats
• Host DMA port (HOSTDP)
• 2 dual-channel, full-duplex synchronous serial ports (SPORTs), supporting eight stereo I2S channels
• 12 peripheral DMAs, 2 mastered by the Ethernet MAC
• 2 memory-to-memory DMAs with external request lines
• Event handler with 54 interrupt inputs
• Serial peripheral interface (SPI) compatible port
• 2 UARTs with IrDA support
• 2-wire interface (TWI) controller
• Eight 32-bit timers/counters with PWM support
• 32-bit up/down counter with rotary support
• Real-time clock (RTC) and watchdog timer
• 32-bit core timer
• 48 general-purpose I/Os (GPIOs), with programmable hysteresis
• NAND flash controller (NEC)
• Debug/JTAG interface
• On-chip PLL capable of frequency multiplication