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ADI AD9643BCPZ-250RoHS

Manufacturer
MPN
AD9643BCPZ-250
LCSC Part #
C653687
Packaging
LFCSP-64(9x9)
Customer #
Key Attributes
14-Bit, Dual Analog-to-Digital Converter (ADC)
Datasheetpdf iconADI AD9643BCPZ-250
In-Stock: 41
41 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 70.0131$ 64.4121$ 64.41
30+$ 66.9269$ 61.5728$ 1847.18
Standard Packaging260/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC)
ManufacturerADI
PackagingLFCSP-64(9x9)
Operating Temperature-40℃~+85℃
Clock Frequency625MHz
FeaturesMulti-chip synchronization
Voltage ReferenceBuilt-in
InterfaceSPI;Parallel port
Resolution(Bits)14;250MHz
S/N Ratio70.6dB
Voltage - Supply1.8V
Number of Channels2
Integral non - linearity3.5LSB

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging260
Sales UnitPiece

Introduction

AI Translation

The AD9643 is a dual, 14-bit analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. It is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired. The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. The ADC output data is routed directly to the external, 14-bit, LVDS output port and formatted as either interleaved or channel multiplexed. Flexible power-down options allow significant power savings, when desired. Programming for setup and control are accomplished using a 3-wire SPI-compatible serial interface. The AD9643 is available in a 64-lead LFCSP and is specified over the industrial temperature range of -40°C to +85°C.

Features

AI Translation
  • SNR = 70.6 dBFS at 185 MHz AIN and 250 MSPS
  • SFDR = 85 dBc at 185 MHz AIN and 250 MSPS
  • −151.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS
  • Total power consumption: 785 mW at 250 MSPS
  • 1.8 V supply voltages
  • LVDS (ANSI-644 levels) outputs
  • Integer 1-to-8 input clock divider (625 MHz maximum input)
  • Sample rates of up to 250 MSPS
  • IF sampling frequencies of up to 400 MHz
  • Internal ADC voltage reference
  • Flexible analog input range 1.4 V p-p to 2.0 V p-p (1.75 V p-p nominal)
  • ADC clock duty cycle stabilizer
  • 95 dB channel isolation/crosstalk
  • Serial port control
  • Energy saving power-down modes

Applications

AI Translation
  • Communications
  • Diversity radio systems
  • Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE
  • I/Q demodulation systems
  • Smart antenna systems
  • General-purpose software radios
  • Ultrasound equipment
  • Broadband data applications