ADI AD9273BBCZ-40

The AD9273 is designed for low-cost, low-power, small-footprint, and ease-of-use applications. It integrates an eight-channel LNA with VGA, AAF, and a 12-bit, 10 MSPS to 50 MSPS ADC.

Each channel features a 42 dB variable gain range, fully differential signal path, active input preamplifier termination, maximum gain of 52 dB, and an ADC with conversion rates up to 50 MSPS. The channels are optimized for dynamic range and low power, making them suitable for applications requiring small package sizes.

The LNA provides single-ended-to-differential gain, selectable via SPI. At a gain of 21.3 dB, the LNA input-referred noise voltage is typically 1.26 nV/√Hz; at typical gain, the input-referred noise of the entire channel is 1.42 nV/√Hz. Assuming a noise bandwidth of 15 MHz and an LNA gain of 21.3 dB, the input SNR is approximately 91 dB. In continuous wave Doppler mode, the LNA output drives a transconductance amplifier, which is switched through an 8×8 differential crosspoint switch. This switch is configurable via SPI.

The AD9273 requires an LVPECL/CMOS/LVDS-compatible sample rate clock signal to achieve full operating performance. No external voltage reference or driving components are required to meet the needs of many applications.

The ADC automatically multiplies the sample rate clock to generate the appropriate LVDS serial data rate. It provides a data clock (DCO±) for capturing data at the output, and a frame clock (FCO±) trigger to signal the start of a new output byte.

Each channel can be independently powered down to extend battery life in portable applications. A standby mode option enables fast power-up for quick restart. In CW Doppler mode, the VGA, AAF, and ADC all enter a power-saving mode. The power consumption of the TGC path is proportional to the selected speed grade.

The ADC incorporates multiple features such as programmable clock and data alignment and programmable digital test pattern generation, enabling maximum device flexibility and minimum system cost. Digital test patterns include built-in fixed and pseudorandom patterns, as well as user-defined test patterns entered via the serial port interface.

The AD9273 is fabricated using an advanced CMOS process and is available in a 16 mm×16 mm, RoHS-compliant 100-lead TQFP package or a 144-lead BGA package. It is rated for the -40°C to +85°C industrial temperature range.

• 8-channel LNA, VGA, AAF, and ADC
• LNA input-referred noise voltage μ=1.26 nV/√Hz (gain =27.3 dB, 5 MHz, typical)
• SPI-programmable gain = 15.6 dB/17.9 dB/21.3 dB
• Single-ended input; VIN max τ=733 mV p·p/δ550 mV p·p/367 mV p·p
• Dual-mode active input impedance matching BW: >100 MHz
• Full-scale (FS) output =4.4 V p-p differential
• VGA attenuator range = −42 dB to 0 dB
• SPI-programmable PGA gain =2↑ dB/24 dB/27 dB/30 dB
• Linear-in-dB gain control
• AAF programmable 2nd-order LPF: 8 MHz to 18 MHz
• Programmable HPF
• ADC 12-bit at 10 MSPS to 50 MSPS
• SNR=70 dB
• SFDR =75 dB
• Serial LVDS (ANSI-644, IEEE 1596.3 Reduced Range Link) data clock output and frame clock output
• Includes an 8×8 differential crosspoint switch to support continuous wave (CW) Doppler mode
• Low power: 109 mW per channel at 12-bit/40 MSPS (TGC)
• 70 mW per channel in CW Doppler mode
• Flexible power-down modes
• Overload recovery time: <10 ns
• Fast recovery from low-power standby mode: <2 μs
• 100-lead TQFP and 144-ball BGA packages
• Small footprint — 8 channels integrated in a compact package. Complete TGC path, ADC, and crosspoint switch in a 100-lead, 16 mm×16 mm TQFP or 144-ball BGA package
• Low power: 109 mW per channel (40 MSPS)
• Integrated crosspoint switch — enables multiple multichannel configuration options for CW Doppler mode
• Easy to use — DCO± operates up to 300 MHz, supporting DDR operation
• Flexible — SPI control provides rich, flexible features to meet diverse system-specific requirements
• Integrated 2nd-order AAF — located between VGA and ADC, programmable from 8 MHz to 18 MHz

• Medical imaging/ultrasound
• Automotive radar