ADI AD8348ARUZ

The AD8348 is a broadband quadrature demodulator with an integrated intermediate frequency (IF), variable gain amplifier (VGA), and integrated baseband amplifiers. It is suitable for use in communications receivers, performing quadrature demodulation from IF directly to baseband frequencies. The baseband amplifiers are designed to interface directly with dual-channel ADCs, such as the AD9201, AD9283, and AD9218, for digitizing and postprocessing. The IF input signal is fed into two Gilbert cell mixers through an X-AMP VGA. The IF VGA provides 44 dB of gain control. A precision gain control circuit sets a linear-in-decibel gain characteristic for the VGA and provides temperature compensation. The LO quadrature phase splitter employs a divide-by-2 frequency divider to achieve high quadrature accuracy and amplitude balance over the entire operating frequency range. Optionally, the IF VGA can be disabled and bypassed. In this mode, the IF signal is applied directly to the quadrature mixer inputs via the MXIP and MXIN pins. Separate I- and Q-channel baseband amplifiers follow the baseband outputs of the mixers. The voltage applied to the VCMO pin sets the dc common-mode voltage level at the baseband outputs. Typically, VCMO is connected to the internal VREF voltage, but it can also be connected to an external voltage. This flexibility allows the user to maximize the input dynamic range to the ADC. Connecting a bypass capacitor at each offset compensation input (IOFS and QOFS) nulls dc offsets produced in the mixer. Offset compensation can be overridden by applying an external voltage at the offset compensation inputs. The mixers’ outputs are brought off-chip for optional filtering before final amplification. Inserting a channel selection filter before each baseband amplifier increases the baseband amplifiers’ signal handling range by reducing the amplitude of high level, out-of-channel interferers before the baseband signal is fed into the I/Q baseband amplifiers. The single-ended mixer output is amplified and converted to a differential signal for driving ADCs.

• Integrated I/Q demodulator with IF VGA amplifier
• Operating IF frequency 50 MHz to 1000 MHz (3 dB IF BW of 500 MHz driven from Rs (overline) = 200 Ω
• Demodulation bandwidth 75 MHz
• Linear-in-decibel AGC range 44 dB
• Third-order intercept IIP3 ±28 dBm @ minimum gain (F_IF = 380 MHz) IIP3 −8 dBm @ maximum gain (F_IF = 380 MHz)
• Quadrature demodulation accuracy Phase accuracy 0.5° Amplitude balance 0.25 dB
• Noise figure 11 dB @ maximum gain (F_IF = 380 MHz)
• LO input −10 dBm
• Single supply 2.7 V to 5.5 V
• Power-down mode
• Compact, 28-lead TSSOP package

• QAM/QPSK demodulator
• W-CDMA/CDMA/GSM/NADC
• Wireless local loop
• LMDS