Infineon CY8C4245AZA-M443

PSoC 4 is a scalable and reconfigurable platform architecture for a range of AEC-Q100 compliant programmable embedded system controllers based on the Arm Cortex-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible auto-routing capability. The PSoC 4200M family, built on this platform architecture, integrates a microcontroller, digital programmable logic, programmable analog, programmable interconnect, high-performance ADC, op-amps with comparator mode, and standard communication and timing peripherals. The PSoC 4200M family maintains full compatibility with other members of the PSoC 4 platform to address new application and design requirements. The programmable analog and digital subsystems provide design flexibility and support field tuning.

• 32-bit microcontroller subsystem
• AEC-Q100 qualified
• 48 MHz Arm Cortex-M0 CPU with single-cycle multiply
• Up to 128 kB flash with read accelerator
• Up to 16 kB SRAM
• Direct memory access engine
• Programmable analog
• Four op-amps operating in Deep Sleep mode at very low current levels
• All op-amps feature reconfigurable high-current pin drive, high-bandwidth internal drive, ADC input buffer, and comparator mode, with flexible connectivity allowing input connection to any pin
• Four current DACs for general-purpose or capacitive sensing applications on any pin
• Two low-power comparators operating in Deep Sleep mode
• 12-bit SAR ADC at 1 Msps
• Programmable digital
• Four programmable logic blocks, each with 8 macrocells and an 8-bit datapath
• Peripheral component library, user-defined state machines, and Verilog input support
• Low power, 1.71 to 5.5 V operating voltage range
• 20 nA Stop mode with GPIO wakeup
• Sleep and Deep Sleep modes allow trade-off between wakeup time and power consumption
• Capacitive sensing
• Capacitive Sigma-Delta technology for best-in-class SNR and water immunity
• Software components to simplify capacitive sensing design
• Automatic hardware tuning
• Segment LCD drive
• LCD drive support on all pins
• Deep Sleep mode operation with 4-bit memory per pin
• Serial communication
• Four independent, runtime-reconfigurable serial communication blocks supporting reconfigurable I2C, SPI, UART, or LIN slave
• Two independent CAN modules for in-vehicle networking
• Timing and PWM
• Eight 16-bit timer/counter PWM modules
• Center-aligned, edge, and pseudo-random modes
• Comparator-based trigger for motor drive and other high-reliability digital logic applications
• Package options
• 48-pin, 64-pin TQFP and 56-pin QFN packages
• Functional capability
• Up to 51 programmable GPIO pins
• GPIO pins configurable for capacitive sensing, LCD, analog, or digital functions
• Programmable drive mode, strength, and slew rate
• Temperature range
• Grade A: -40°C to +85°C
• Grade S: -40°C to +105°C
• PSoC Creator design environment
• IDE with schematic design entry and build capabilities
• API support for all fixed-function and programmable peripherals
• Industry-standard tool compatibility
• Arm-based industry-standard development tools available after schematic entry