MICROCHIP PIC32MK0512MCF064-E/MR

32-bit General Purpose and Motor Control Application MCUs with FPU and up to 1 MB Live-Update Flash, 256 KB SRAM, 4 KB EEPROM, and Op amps. Operating Conditions: 2.2V to 3.6V.

• MIPS 32® microAptiv™ MCU core with Floating Point Unit
• microMIPS™ mode for up to 40% smaller code size
• DSP-enhanced core: Four 64-bit accumulators, Single-cycle MAC, saturating and fractional math
• Code-efficient (C and Assembly) architecture
• Two 32-bit core register files to reduce interrupt latency
• 8 MHz ±5% (FRC) internal oscillator 0℃ to +70℃
• Programmable PLLs and oscillator clock sources: HS and EC clock modes, Secondary USB PLL, 32 kHz Internal Low-power RC oscillator (LPRC), Independent external low-power 32 kHz crystal oscillator
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timers (WDT) and Deadman Timer (DMT)
• Fast wake-up and start-up
• Four Fractional clock out (REFCLKO) modules
• Low-power management modes (Deep Sleep, Sleep, and Idle)
• Integrated: Power-on Reset (POR) and Brown-out Reset (BOR)
• On-board capacitorless regulator
• Eight PWM pairs
• Six additional Single-Ended PWM modules
• Dead Time for rising and falling edges
• Dead-Time Compensation
• 8.33 ns PWM Resolution
• Clock Chopping for High-Frequency Operation
• PWM Support for: DC/DC, AC/DC, inverters, PFC, lighting, BLDC, PMSM, ACIM, SRM motors
• Choice of six Fault and Current Limit Inputs
• Flexible Trigger Configuration for ADC Triggering
• Six Quadrature Encoder Interface (QEI) modules: Four inputs: Phase A, Phase B, Home, and Index
• External Graphics interfaces through PMP
• Up to six I²S audio data communication interfaces
• Up to six SPI audio control interfaces
• Programmable audio master clock: Generation of fractional clock frequencies, Can be synchronized with USB clock, Can be tuned in run-time
• Permanent non-volatile 4-word unique device serial number
• Direct Memory Access (DMA): Up to eight channels with automatic data size detection, Programmable Cyclic Redundancy Check (CRC), Up to 64 KB transfers
• Advanced Memory Protection: Peripheral and memory region access control
• 12-bit ADC module: Sum of all individual ADC's combined, 25.45 Msps 12-bit mode or 33.79 Msps 8-bit mode, 7 individual ADC modules, 3.75 Msps per S&H with dedicated DMA, Up to 42 analog inputs
• Flexible and independent ADC trigger sources
• Four Op amps and five Comparators
• Up to three 12-bit CDACs
• Internal temperature sensor ±2℃ accuracy
• Capacitive Touch Divider (CVD)
• Up to four CAN modules (with dedicated DMA channels): 2.0B Active with DeviceNet™ addressing support
• Up to six UART modules (up to 25 Mbps): Supports LIN 1.2 and IrDA® protocols
• Six SPI/I²S modules (SPI 50 Mbps)
• Parallel Master Port (PMP)
• Up to two FS USB 2.0-compliant On-The-Go (OTG) controllers
• Peripheral Pin Select (PPS) to enable remappable pin functions
• Up to 14 16-bit or one 16-bit and eight 32-bit timers/counters for GP and MC devices and six additional QEI 32-bit timers for MC devices
• 16 Output Compare (OC) modules
• 16 Input Capture (IC) modules
• PPS to enable function remap
• Real-Time Clock and Calendar (RTCC) module
• 5V-tolerant pins with up to 22 mA source/sink
• Selectable internal open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
• Five programmable edge/level-triggered interrupt pins
• AEC-Q100 REVG (Grade 1 -40℃ to +125℃) (planned)
• Class B Safety Library, IEC 60730 (planned)
• Back-up internal oscillator
• Clock monitor with back-up internal oscillator
• Global register locking
• In-circuit and in-application programming
• 2-wire or 4-wire MIPS® Enhanced JTAG interface
• Unlimited software and 12 complex breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Non-intrusive hardware-based instruction trace
• C/C++ compiler with native DSP/fractional support
• MPLAB® Harmony Integrated Software Framework
• TCP/IP, USB, Graphics, and mTouch™ middleware
• MFi, Android™ and Bluetooth® audio frameworks
• RTOS Kernels: Express Logic ThreadX, FreeRTOS™, OPENRTOS®, Micrium® OS/0S™, and SEGGER embOS®