MICROCHIP LAN9115-MT

The LAN9115 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9115 has been architected to provide the best price-performance ratio for any 16-bit application with medium performance requirements. The LAN9115 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant. The LAN9115 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors exposing a 16-bit external bus. The LAN9115 includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9115 memory buffer architecture allows the most efficient use of memory resources by optimizing

• Member of LAN9118 Family; optimized for medium-performance applications
• Easily interfaces to most 16-bit embedded CPU’s
• Efficient architecture with low CPU overhead
• Integrated PHY; supports external PHY via MII interface
• Supports audio & video streaming over Ethernet: multiple standard-definition (SD) MPEG2 streams
• Medium-speed member of LAN9118 Family (all members are pin-compatible)
• Non-PCI Ethernet controller for medium-performance applications - 16-bit interface - Burst-mode read support - External MII Interface
• Eliminates dropped packets - Internal SRAM can store over 200 packets - Supports automatic or host-triggered PAUSE and back-pressure flow control
• Minimizes CPU overhead - Supports Slave-DMA - Interrupt Pin with Programmable Hold-off timer
• Reduces system cost and increases design flexibility - SRAM-like interface easily interfaces to most Embedded CPU’s or SoC’s - Low-cost, low--pin count non-PCI interface for embedded designs
• Numerous power management modes - Wake on LAN - Magic packet wakeup - Wakeup indicator event signal - Link Status Change
• Fully compliant with IEEE 802.3/802.3u standards
• Integrated Ethernet MAC and PHY - 10BASE-T and 100BASE-TX support - Full- and Half-duplex support - Full-duplex flow control - Backpressure for half-duplex flow control - Preamble generation and removal - Automatic 32-bit CRC generation and checking - Automatic payload padding and pad removal - Loop-back modes
• Flexible address filtering modes - One 48-bit perfect address - 64 hash-filtered multicast addresses - Pass all multicast - Promiscuous mode - Inverse filtering - Pass all incoming with status report - Disable reception of broadcast packets
• Integrated Ethernet PHY - Auto-negotiation - Automatic polarity detection and correction
• High-Performance host bus interface - Simple, SRAM-like interface - 16-bit data bus - Large, 16Kbyte FIFO memory that can be allocated to RX or TX functions - One configurable host interrupt
• Miscellaneous features - Low profile 100-pin, TQFP RoHS Compliant package - Integral 1.8V regulator - General Purpose Timer - Support for optional EEPROM - Support for 3 status LEDs multiplexed with Programmable GPIO signals
• 3.3V Power Supply with 5V tolerant I/O
• 0 to 70℃

• Printers, kiosks, security systems
• General embedded applications
• Audio distribution systems
• Basic Cable, satellite, and IP set-top boxes
• Video-over IP Solutions, IP PBX & Video Phones
• Wireless routers & access points
• Digital video recorders