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MICROCHIP KSZ8863RLLIRoHS

Manufacturer
MPN
KSZ8863RLLI
LCSC Part #
C631675
Packaging
LQFP-48(7x7)
Customer #
Key Attributes
Integrated 3-Port 10/100 Managed Switch with PHYs
Datasheetpdf iconMICROCHIP KSZ8863RLLI
In-Stock: 4,276
4,276 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 3.9993$ 4.00
10+$ 3.4338$ 34.34
30+$ 3.0984$ 92.95
250+$ 2.7581$ 689.53
500+$ 2.6025$ 1301.25
1,000+$ 2.5312$ 2531.20
Standard Packaging250/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Interface Controllers
ManufacturerMICROCHIP
PackagingLQFP-48(7x7)
FeaturesCable diagnostics;Programmable LED indication;Low-power mode
Operating Temperature-40℃~+85℃
Voltage - Supply3.3V
Number of ports3
Data Rate10Mbit/s;100Mbit/s
MAC InterfaceRMII
Ethernet Speed Standards10BASE-T;100BASE-TX

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging250
Sales UnitPiece

Introduction

AI Translation

KSZ8863MLL, KSZ8863FLL, and KSZ8863RLL are highly integrated 3-port switch-on-a-chip ICs in the industry’s smallest footprint. They are designed to enable a new generation of low port count, cost-sensitive, and power-efficient 10/ 100 Mb

Features

AI Translation
  • Advanced Switch Features
    • IEEE 802.1q VLAN Support for Up to 16 Groups (Full Range of VLAN IDs)
    • VLAN ID Tag/Untag Options, Per Port Basis
    • IEEE 802.1p/q Tag Insertion or Removal on a Per Port Basis (Egress)
    • Programmable Rate Limiting at the Ingress and Egress on a Per Port Basis
    • Broadcast Storm Protection with Percent Control (Global and Per Port Basis)
    • IEEE 802.1d Rapid Spanning Tree Protocol Support
    • Tail Tag Mode (1 byte Added before FCS) Support at Port 3 to Inform the Processor which Ingress Port Receives the Packet and its Priority
    • Bypass Feature that Automatically Sustains the Switch Function between Port 1 and Port 2 when CPU (Port 3 Interface) Goes to the Sleep Mode
    • Self-Address Filtering
    • Individual MAC Address for Port 1 and Port 2
    • Supports RMII Interface and 50 MHz Reference Clock Output
    • IGMP Snooping (IPv4) Support for Multicast Packet Filtering
    • IPv4/IPv6 QoS Support
    • MAC Filtering Function to Forward Unknown Unicast Packets to Specified Port
  • Comprehensive Configuration Register Access
    • Serial Management Interface (SMI) to All Internal Registers
    • MII Management (MIIM) Interface to PHY Registers
    • High Speed SPI and I²C Interface to All Internal Registers
    • I/O Pins Strapping and EEPROM to Program Selective Registers in Unmanaged Switch Mode
    • Control Registers Configurable on the Fly (PortPriority, 802.1p/d/q, AN…)
  • QoS/CoS Packet Prioritization Support
    • Per Port, 802.1p and DiffServ-Based
    • Re-Mapping of 802.1p Priority Field Per Port basis, Four Priority Levels
  • Proven Integrated 3-Port 10/100 Ethernet Switch
    • 3rd Generation Switch with Three MACs and Two PHYs Fully Compliant with IEEE 802.3u Standard
    • Non-Blocking Switch Fabric Ensures Fast Packet Delivery by Utilizing a 1k MAC Address Lookup Table and a Store-and-Forward Architecture
    • Full-Duplex IEEE 802.3x Flow Control (PAUSE) with Force Mode Option
    • Half-Duplex Back Pressure Flow Control
    • HP Auto MDI-X for Reliable Detection of and Correction for Straight-Through and Crossover Cables with Disable and Enable Option
    • LinkMD TDR-Based Cable Diagnostics Permit Identification of Faulty Copper Cabling
    • MII Interface Supports Both MAC Mode and PHY Mode
    • Comprehensive LED Indicator Support for Link, Activity, Full-/Half-Duplex and 10/100 Speed
    • HBM ESD Rating 4 kV
  • Switch Monitoring Features
    • Port Mirroring/Monitoring/Sniffing: Ingress and/ or Egress Traffic to Any Port or MII
    • MIB Counters for Fully Compliant Statistics Gathering 34 MIB Counters Per Port
    • Loopback Modes for Remote Diagnostic of Failure
  • Low Power Dissipation
    • Full-Chip Software Power-Down (Register Configuration Not Saved)
    • Energy-Detect Mode Support
    • Dynamic Clock Tree Shutdown Feature
    • Per Port Based Software Power-Save on PHY (Idle Link Detection, Register Configuration Preserved)
    • Voltages: Single 3.3V Supply with Internal 1.8V LDO for 3.3V VDDIO
    • Optional 3.3V, 2.5V, and 1.8V for VDDIO
    • Transceiver Power 3.3V for VDDA_3.3
  • Industrial Temperature Range: -40°C to +85°C
  • Available in a 48-Pin LQFP, Lead-Free Package

Applications

AI Translation
  • VoIP Phone
  • Set-Top/Game Box
  • Automotive
  • Industrial Control
  • IPTV POF
  • SOHO Residential Gateway
  • Broadband Gateway/Firewall/VPN
  • Integrated DSL/Cable Modem
  • Wireless LAN Access Point + Gateway
  • Standalone 10/100 Switch