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MICROCHIP MCP2518FDT-E/SL product image
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MICROCHIP MCP2518FDT-E/SLRoHS

Manufacturer
MPN
MCP2518FDT-E/SL
LCSC Part #
C626758
Packaging
SOIC-14
Customer #
Key Attributes
External CAN FD Controller with SPI Interface
Datasheetpdf iconMICROCHIP MCP2518FDT-E/SL

Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Interface Controllers
ManufacturerMICROCHIP
PackagingSOIC-14
FeaturesProgrammable auto retransmission control;Low-power mode;Monitor mode
Operating Temperature-40℃~+125℃
Voltage - Supply2.7V~5.5V
ProtocolSPI
Data Rate8Mbps
TypeCAN FD Controller
Supply Current20mA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2600
Sales UnitPiece

Introduction

AI Translation

The MCP2518FD device is a cost-effective and small-footprint CAN FD controller that can be easily added to a microcontroller with an available SPI interface. A CAN FD channel can be easily added to a microcontroller that is either lacking a CAN FD peripheral or does not have enough CAN FD channels. MCP2518FD supports both CAN frames in the Classical format (CAN2.0B) and CAN Flexible Data Rate (CAN FD) format, as specified in ISO 11898-1:2015. The MCP2518FD device was improved as follows:

  • Added Low Power Mode (LPM), in order to reduce leakage current to 10 μA over the full temperature range.
  • Extended SEQ field in Transmit Message Object and Transmit Event FIFO Object from 7 to 23 bits.
  • Added DEVID register to distinguish between future members of the device family.
  • Switched to saw cut DFN package with wettable flanks.

Features

AI Translation
  • External CAN FD Controller with Serial Peripheral Interface (SPI)
  • Arbitration Bit Rate up to 1 Mbps
  • Data Bit Rate up to 8 Mbps
  • CAN FD Controller modes - Mixed CAN 2.0B and CAN FD Mode - CAN 2.0B Mode
  • Conforms to ISO 11898-1:2015
  • 31 FIFOs, configurable as Transmit or Receive FIFOs
  • One Transmit Queue (TXQ)
  • Transmit Event FIFO (TEF) with 32 bit time stamp
  • Message transmission prioritization: - Based on priority bit field - Message with lowest ID gets transmitted first using the Transmit Queue (TXQ)
  • Programmable automatic retransmission attempts: unlimited, 3 attempts or disabled
  • 32 Flexible Filter and Mask Objects
  • Each object can be configured to filter either: - Standard ID + first 18 data bits, or - Extended ID
  • 32-bit Time Stamp
  • VDD: 2.7 to 5.5 V
  • Active Current: maximum 20 mA at 5.5 V, 40 MHz CAN clock
  • Sleep Current: 15 μA, typical
  • Low Power Mode current: maximum 10 μA from -40°C to +150°C
  • Message Objects are located in RAM: 2 KB
  • Up to 3 Configurable Interrupt Pins
  • Bus Health Diagnostics and Error Counters
  • Transceiver Standby Control
  • Start of frame pin for indicating the beginning of messages on the bus
  • AEC-Q100 Qualified
  • Temperature Ranges: - Extended (E): -40°C to +125°C - High (H): -40°C to +150°C
  • 40, 20 or 4 MHz Crystal or Ceramic Resonator; External Clock Input
  • Clock Output with Prescaler
  • Up to 20 MHz SPI clock speed
  • Supports SPI Modes 0,0 and 1,1
  • Registers and bit fields are arranged in a way to enable efficient access through SPI
  • SPI commands with CRC to detect noise on SP interface
  • Error Correction Code (ECC) protected RAM
  • GPIO pins: INT0 and INT1 can be configured as general purpose I/O
  • Open drain outputs: TXCAN, INT, INT0, and INT1 pins can be configured as push/pull or open drain outputs
  • ISO 26262 Functional Safety ready
In-Stock: 53,437
53,437 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 1.3163$ 1.32
10+$ 1.1456$ 11.46
30+$ 0.9844$ 29.53
100+$ 0.8648$ 86.48
500+$ 0.8153$ 407.65
1,000+$ 0.7914$ 791.40
Standard Packaging2600/Full Reel
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