MICROCHIP 25LC1024T-I/MF
| Manufacturer | |
| MPN | 25LC1024T-I/MF |
| LCSC Part # | C612309 |
| Packaging | DFN-8-EP(5x6) |
| Customer # | |
| Key Attributes | 1-Mbit SPI Bus Serial EEPROM |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | MICROCHIP | |
| Packaging | DFN-8-EP(5x6) | |
| Voltage - Supply | 2.5V~5.5V | |
| Memory Size | 1Mbit | |
| Operating temperature | -40℃~+85℃ | |
| Clock Frequency | 20MHz | |
| Features | Hardware write protection function;Built-in write enable latch (WEL);Power-down/Power-up protection circuit | |
| Data Retention - TDR (Year) | 200 Years | |
| Write Cycle Time(tWC) | 6ms | |
| Interface | SPI | |
| Write Cycle Endurance | 1,000,000 cycles |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3300 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 25LC1024 is a 1024-Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase instructions typically associated with Flash-based products. These instructions are not required for byte or page write operations. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled by a Chip Select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.
Features
- 20 MHz Maximum Clock Speed
- Byte and Page-Level Write Operations: 256-byte page 6 ms maximum write cycle time - No page or sector erase required
- Low-Power CMOS Technology:
- Maximum Write current: 5 mA at 5.5V, 20 MHz
- Read current: 7 mA at 5.5V, 20 MHz
- Standby current: 1 μA at 2.5V (Deep power-down)
- Electronic Signature for Device ID
- Self-Timed Erase and Write Cycles:
- Page Erase (6 ms maximum)
- Sector Erase (10 ms maximum)
- Chip Erase (10 ms maximum)
- Sector Write Protection (32K byte/sector):
- Protect none, 1/4, 1/2 or all of array
- Built-In Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
- High Reliability:
- Endurance: 1M erase/write cycles
- Data Retention: > 200 years
- ESD Protection: > 4000V
- Temperature Ranges Supported:
- Industrial (I): -40℃ to +85℃
- Extended (E): -40℃ to +125℃
- RoHS Compliant
- Automotive AEC-Q100 Qualified
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 5.4946 | $ 5.49 |
| 10+ | $ 4.702 | $ 47.02 |
| 30+ | $ 4.2316 | $ 126.95 |
| 100+ | $ 3.7548 | $ 375.48 |
| 500+ | $ 3.535 | $ 1767.50 |
| 1,000+ | $ 3.4374 | $ 3437.40 |
Standard Packaging3300/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | MICROCHIP | |
| Packaging | DFN-8-EP(5x6) | |
| Voltage - Supply | 2.5V~5.5V | |
| Memory Size | 1Mbit | |
| Operating temperature | -40℃~+85℃ | |
| Clock Frequency | 20MHz | |
| Features | Hardware write protection function;Built-in write enable latch (WEL);Power-down/Power-up protection circuit | |
| Data Retention - TDR (Year) | 200 Years | |
| Write Cycle Time(tWC) | 6ms | |
| Interface | SPI | |
| Write Cycle Endurance | 1,000,000 cycles |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3300 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 25LC1024 is a 1024-Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase instructions typically associated with Flash-based products. These instructions are not required for byte or page write operations. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled by a Chip Select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.
Features
- 20 MHz Maximum Clock Speed
- Byte and Page-Level Write Operations: 256-byte page 6 ms maximum write cycle time - No page or sector erase required
- Low-Power CMOS Technology:
- Maximum Write current: 5 mA at 5.5V, 20 MHz
- Read current: 7 mA at 5.5V, 20 MHz
- Standby current: 1 μA at 2.5V (Deep power-down)
- Electronic Signature for Device ID
- Self-Timed Erase and Write Cycles:
- Page Erase (6 ms maximum)
- Sector Erase (10 ms maximum)
- Chip Erase (10 ms maximum)
- Sector Write Protection (32K byte/sector):
- Protect none, 1/4, 1/2 or all of array
- Built-In Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
- High Reliability:
- Endurance: 1M erase/write cycles
- Data Retention: > 200 years
- ESD Protection: > 4000V
- Temperature Ranges Supported:
- Industrial (I): -40℃ to +85℃
- Extended (E): -40℃ to +125℃
- RoHS Compliant
- Automotive AEC-Q100 Qualified
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |



