Nexperia 74LVC541APW,118
| Manufacturer | |
| MPN | 74LVC541APW,118 |
| LCSC Part # | C6093 |
| Packaging | TSSOP-20 |
| Customer # | |
| Key Attributes | Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-20 | |
| Input type | Schmitt trigger | |
| Voltage - Supply | 1.2V~3.6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 24mA | |
| Series | 74LVC | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 8 | |
| Channel Type | Unidirectional | |
| Features | Output enable;Power-off isolation;Level shifting | |
| Number of Elements | 1 | |
| Propagation Delay | 2.9ns@3.3V,50pF | |
| Quiescent Current | 40uA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC541A is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (OE1 and OE2). A HIGH on OEn causes the associated outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The l_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Overvoltage tolerant inputs to 5.5 V
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Applications
- Level translator for mixed 3.3V and 5V environments
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.5432 | $ 0.54 |
| 10+ | $ 0.4379 | $ 4.38 |
| 30+ | $ 0.386 | $ 11.58 |
| 100+ | $ 0.3341 | $ 33.41 |
| 500+ | $ 0.2968 | $ 148.40 |
| 1,000+ | $ 0.2806 | $ 280.60 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | Nexperia | |
| Packaging | TSSOP-20 | |
| Input type | Schmitt trigger | |
| Voltage - Supply | 1.2V~3.6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 24mA | |
| Series | 74LVC | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 8 | |
| Channel Type | Unidirectional | |
| Features | Output enable;Power-off isolation;Level shifting | |
| Number of Elements | 1 | |
| Propagation Delay | 2.9ns@3.3V,50pF | |
| Quiescent Current | 40uA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC541A is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (OE1 and OE2). A HIGH on OEn causes the associated outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The l_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Overvoltage tolerant inputs to 5.5 V
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Applications
- Level translator for mixed 3.3V and 5V environments
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



