SKYWORKS SI53326-B-GMR

The Si53320–28 family of LVPECL fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range from dc to 725/1250 MHz. Built-in LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments. The Si53320–28 family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. The Si53320-28 are a family of low-jitter, low-skew, fixed-format (LVPECL) buffers. All devices except the Si53326 and Si53328 have a universal input that accepts most common differential or LVCMOS input signals. The Si53326 and Si53328 accept only single-ended LVCMOS inputs. These devices are available in multiple configurations customized for the end application.

• Ultra-low additive jitter: 50 fs rms
• Built-in LDOs for high PSRR performance
• Up to 10 LVPECL Outputs
• Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS)
• Wide frequency range: dc to 1250 MHz
• Output Enable option
• Multiple configuration options
• Dual Bank option
• 2:1 Input Mux operation
• RoHS compliant, Pb-free
• Temperature range: -40 to +85 ℃

• clock/data distribution
• redundant clocking