TI SMJ44400-80HMM

The SMJ44400 series are high-speed 4,194,304-bit DRAMs organized as 1,048,576 × 4-bit words. They utilize state-of-the-art EPIC (Enhanced Performance Implanted CMOS) technology to achieve high performance, high reliability, and low-power operation.

The SMJ44400 offers maximum row access times of 80 ns, 100 ns, and 120 ns. Maximum power dissipation is as low as 360 mW in active mode and 22 mW in standby mode.

All inputs and outputs, including clocks, are compatible with 54-series TTL. All address and data inputs are latched on-chip to simplify system design. Data outputs are unlatched to allow greater system flexibility.

The SMJ44400 is available in the following packages: 400-mil 20/26-pin leadless ceramic surface-mount SOLCC package (HM suffix), 20-pin ceramic DIP (JD suffix), 20-pin ceramic flatpack (HR suffix), and 20-pin leadded ceramic chip carrier (CsoJ). All packages support an operating temperature range of -55°C to 125°C.