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TI CD40106BPWRRoHS

Manufacturer
MPN
CD40106BPWR
LCSC Part #
C58834
Packaging
TSSOP-14
Customer #
Key Attributes
CMOS Hex Schmitt Triggers
Datasheetpdf iconTI CD40106BPWR
In-Stock: 580
580 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.6026$ 0.60
10+$ 0.4951$ 4.95
30+$ 0.4414$ 13.24
100+$ 0.3876$ 38.76
500+$ 0.3551$ 177.55
1,000+$ 0.329$ 329.00
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingTSSOP-14
Input TypeSchmitt trigger
Logic Family4000B
Voltage - Supply3V~18V
Output Logic Level - Low50mV
Propagation Delay120ns@15V,50pF
FeaturesNoise suppression function
Operating Temperature-55℃~+125℃
Input Logic Level - High3.6V~10.8V
Input Logic Level - Low900mV~4V
Number of Circuits6
Output Logic Level - High4.95V;9.95V;14.95V
Quiescent Current(Iq)4uA
Number of Channels1
Current - Output High(IOH)3.4mA
Current - Output Low(IOL)3.4mA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

CD40106B consists of six Schmitttrigger circuits. Each circuit functions as an inverter with Schmitt-trigger action on the input. The trigger switches at different points for positive- and negative-going signals. The difference between the positive-going voltage (VP) and the negative-going voltage is defined as hysteresis voltage. The CD40106B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

Features

AI Translation
  • Schmitt-trigger action with no external components
  • Hysteresis voltage (typ.) 0.9 V at VDD = 5 V, 2.3 V at VDD = 10 V, and 3.5 V at VDD = 15 V
  • Noise immunity greater than 50%
  • No limit on input rise and fall times
  • Standardized, symmetrical output characteristics tested for quiescent current at 20 V
  • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Low VDD to Vss current during slow input ramp
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

Applications

AI Translation
  • Wave and pulse shapers
  • High-noise-environment systems
  • Monostable multivibrators
  • Astable multivibrators