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TI SN65DSI86ZQERRoHS

Manufacturer
TI
MPN
SN65DSI86ZQER
LCSC Part #
C575556
Packaging
BGA-64
Customer #
Key Attributes
MIPI DSI to eDP Bridge
Datasheetpdf iconTI SN65DSI86ZQER
In-Stock: 31
31 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 3.6014$ 3.60
10+$ 3.1247$ 31.25
30+$ 2.7323$ 81.97
100+$ 2.4453$ 244.53
500+$ 2.3123$ 1156.15
1,000+$ 2.2539$ 2253.90
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Specialized
ManufacturerTI
PackagingBGA-64
Voltage - Supply1.14V~1.26V
InterfaceI2C
FeaturesFail-safe;Enable/shutdown function;Interrupt generation
Operating Temperature-40℃~+85℃
Data Rate5.4Gbps
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The SN65DSI86 DSI-to-embedded DisplayPort (eDP) bridge features a dual-channel MIPI D-PHY receiver front-end configuration. In this configuration, there are 4 lanes on each channel, with each lane operating at a rate of 1.5 Gbps and a maximum input bandwidth of 12 Gbps. This bridge can decode MIPI DSI 18bpp RGB666 and 24bpp RGB888 video streams and convert the formatted video data stream to DisplayPort with up to four lanes. Each lane can operate at rates of 1.62 Gbps, 2.16 Gbps, 2.43 Gbps, 2.7 Gbps, 3.24 Gbps, 4.32 Gbps, or 5.4 Gbps. The SN65DSI86 is well-suited for WQXGA at 60 frames per second, as well as equivalent 4K at 120 fps (up to 24bpp) and true high-definition (1920 × 1080) resolution 3D graphics. Partial line buffering is implemented to accommodate the data flow mismatch between the DSI and DisplayPort interfaces. The SN65DSI86 is designed with industry-standard interface technologies, is compatible with a variety of microprocessors, and has multiple power management features, including panel refresh support and support for the MIPI-defined ultra-low power state (ULPS). The SN65DSI86 comes in a small-outline 5mm × 5mm MicroStar Junior ball grid array (BGA) package (0.5mm pitch) and operates in a temperature range of -40°C to +85°C.

Features

AI Translation
  • Embedded DisplayPort (eDP) 1.4 standard, supporting 1, 2, or 4 lanes operating at 1.62Gbps (RBR), 2.16Gbps, 2.43Gbps, 2.7Gbps (HBR), 3.24Gbps, 4.32Gbps, or 5.4Gbps (HBR2)
  • Implements MIPI D-PHY version 1.1 physical layer front-end and Display Serial Interface (DSI) version 1.02.00 dual-channel DSI receiver, configurable for 1, 2, 3, or 4 D-PHY data lanes per channel, operating at up to 1.5Gbps per lane
  • Supports 18bpp and 24bpp DSI video streams in RGB666 and RGB888 formats
  • Suitable for 60fps 4K 4096×2304 resolution (18bpp color), 60fps WUXGA 1920×1200 resolution, and 3D graphics display (120fps equivalent)
  • MIPI front-end configurable in single-channel or dual-channel DSI configuration
  • Supports dual-channel DSI odd parity, even parity, left-shift, and right-shift operating modes
  • 1.2V VCC main power supply, 1.8V supply for digital I/O
  • Low-power features including panel self-refresh and MIPI Ultra-Low Power State (ULPS) support
  • DisplayPort lane polarity and mapping fully configurable
  • Supports 12MHz, 19.2MHz, 26MHz, 27MHz, and 38.4MHz via external reference clock (REFCLK)
  • ESD rating ±4 kV (HBM)
  • 64-pin 5mm × 5mm MicroStar Junior BGA (ZQE) package
  • Configurable temperature range: -40°C to +85°C

Applications

AI Translation
  • Tablets, laptops, netbooks
  • Mobile internet devices
  • EPOS, portable data terminals
  • Test and measurement
  • Factory automation and control