Nexperia 74AHCT574BQ,115
| Manufacturer | |
| MPN | 74AHCT574BQ,115 |
| LCSC Part # | C554689 |
| Packaging | DHVQFN-20-EP(2.5x4.5) |
| Customer # | |
| Key Attributes | 4.5V~5.5V 8 1 10.6ns@5V,50pF DHVQFN-20-EP(2.5x4.5) Flip Flops RoHS |
| Datasheet |  Nexperia 74AHCT574BQ,115 |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | Nexperia | |
| Packaging | DHVQFN-20-EP(2.5x4.5) | |
| Operating Temperature | -40℃~+125℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 8 | |
| Series | 74AHCT Series | |
| Output Type | Tri-State | |
| Number of Elements | 1 | |
| Quiescent Current | 4uA | |
| Setup Time | 3ns | |
| Hold Time | 1.5ns | |
| Propagation Delay | 10.6ns@5V,50pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74AHC574; 74AHCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
Features
- Wide supply voltage range: For 74AHC574: from 2.0 V to 5.5 V; For 74AHCT574: from 4.5 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- Balanced propagation delays
- All inputs have a Schmitt-trigger action
- High noise immunity
- 3-state non-inverting outputs for bus orientated applications
- CMOS low power dissipation
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
- Input levels: For 74AHC574: CMOS input level; For 74AHCT574: TTL input level
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 0.0922 | $ 0.09 |
| 10+ | $ 0.075 | $ 0.75 |
| 30+ | $ 0.0664 | $ 1.99 |
| 100+ | $ 0.0599 | $ 5.99 |
| 500+ | $ 0.0548 | $ 27.40 |
| 1,000+ | $ 0.0522 | $ 52.20 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | Nexperia | |
| Packaging | DHVQFN-20-EP(2.5x4.5) | |
| Operating Temperature | -40℃~+125℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 8 | |
| Series | 74AHCT Series | |
| Output Type | Tri-State | |
| Number of Elements | 1 | |
| Quiescent Current | 4uA | |
| Setup Time | 3ns | |
| Hold Time | 1.5ns | |
| Propagation Delay | 10.6ns@5V,50pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74AHC574; 74AHCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
Features
- Wide supply voltage range: For 74AHC574: from 2.0 V to 5.5 V; For 74AHCT574: from 4.5 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- Balanced propagation delays
- All inputs have a Schmitt-trigger action
- High noise immunity
- 3-state non-inverting outputs for bus orientated applications
- CMOS low power dissipation
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
- Input levels: For 74AHC574: CMOS input level; For 74AHCT574: TTL input level
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |