Nexperia 74LVC3G06GS,115
| Manufacturer | |
| MPN | 74LVC3G06GS,115 |
| LCSC Part # | C548749 |
| Packaging | XSON-8(1x1.4) |
| Customer # | |
| Key Attributes | Triple inverter with open-drain output |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | XSON-8(1x1.4) | |
| Logic Family | 74LVC | |
| Input Type | Schmitt trigger | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Logic Level - Low | 550mV | |
| Propagation Delay | 4.3ns@3.3V,50pF | |
| Features | Power shutdown protection;Noise suppression function | |
| Input Logic Level - High | 1.7V;2V | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Circuits | 3 | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | - | |
| Number of Channels | - | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC3G06 is a triple inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- -24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8-B/JESD36 (2.7 V to 3.6 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1152 | $ 0.58 |
| 50+ | $ 0.1127 | $ 5.64 |
| 150+ | $ 0.111 | $ 16.65 |
| 500+ | $ 0.1094 | $ 54.70 |
Standard Packaging5000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | XSON-8(1x1.4) | |
| Logic Family | 74LVC | |
| Input Type | Schmitt trigger | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Logic Level - Low | 550mV | |
| Propagation Delay | 4.3ns@3.3V,50pF | |
| Features | Power shutdown protection;Noise suppression function | |
| Input Logic Level - High | 1.7V;2V | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Circuits | 3 | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | - | |
| Number of Channels | - | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC3G06 is a triple inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- -24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8-B/JESD36 (2.7 V to 3.6 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

