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Nexperia 74LVC3G04DC,125 product image
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Nexperia 74LVC3G04DC,125RoHS

Manufacturer
Nexperia
MPN
74LVC3G04DC,125
LCSC Part #
C548735
Packaging
VSSOP-8-0.5mm
Customer #
Key Attributes
Schmitt trigger 1.65V~5.5V 3.8ns@5.5V,50pF 3 4uA VSSOP-8-0.5mm Gates and Inverters RoHS
Datasheetpdf iconNexperia 74LVC3G04DC,125
In-Stock: 100
100 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.406$ 0.41
10+$ 0.3978$ 3.98
30+$ 0.3913$ 11.74
100+$ 0.3848$ 38.48
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerNexperia
PackagingVSSOP-8-0.5mm
Input TypeSchmitt trigger
Logic Family74LVC
Voltage - Supply1.65V~5.5V
Propagation Delay3.8ns@5.5V,50pF
Output Logic Level - Low-
FeaturesPower shutdown protection;Noise suppression function
Input Logic Level - High-
Input Logic Level - Low-
Operating Temperature-40℃~+125℃
Number of Circuits3
Output Logic Level - High-
Quiescent Current(Iq)4uA
Current - Output High(IOH)24mA
Number of Channels-
Current - Output Low(IOL)24mA
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74LVC3G04 is a triple inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant outputs for interfacing with 5 V logic
  • High noise immunity
  • Complies with JEDEC standard: JESD8 - 7 (1.65 V to 1.95 V) JESD8 - 5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V)
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch - up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power - down mode operation
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS - 001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS - 002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from - 40 ℃ to + 85 ℃ and - 40 ℃ to + 125 ℃

Applications

AI Translation
  • Level translation in mixed 3.3V and 5V environments
  • High noise immunity
  • Direct TTL-level interface
  • Partial power-down mode operation