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Nexperia 74LVC2G06GM,115
| Manufacturer | |
| MPN | 74LVC2G06GM,115 |
| LCSC Part # | C548554 |
| Packaging | XSON-6(1x1.5) |
| Customer # | |
| Key Attributes | Schmitt trigger 1.65V~5.5V 1.6ns@5V,50pF 2 4uA XSON-6(1x1.5) Gates and Inverters RoHS |
| Datasheet |  Nexperia 74LVC2G06GM,115 |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | XSON-6(1x1.5) | |
| Input Type | Schmitt trigger | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 1.6ns@5V,50pF | |
| Output Logic Level - Low | - | |
| Features | Power shutdown protection;Noise suppression function | |
| Input Logic Level - High | 1.7V;2V | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Circuits | 2 | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Number of Channels | - | |
| Current - Output High(IOH) | - | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC2G06 is a dual inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- -24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Applications
- Level translator for mixed 3.3 V and 5 V environments
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1982 | $ 0.99 |
| 50+ | $ 0.1938 | $ 9.69 |
| 150+ | $ 0.1908 | $ 28.62 |
| 500+ | $ 0.1878 | $ 93.90 |
Standard Packaging5000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | XSON-6(1x1.5) | |
| Input Type | Schmitt trigger | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 1.6ns@5V,50pF | |
| Output Logic Level - Low | - | |
| Features | Power shutdown protection;Noise suppression function | |
| Input Logic Level - High | 1.7V;2V | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Circuits | 2 | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Number of Channels | - | |
| Current - Output High(IOH) | - | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC2G06 is a dual inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- -24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Applications
- Level translator for mixed 3.3 V and 5 V environments
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |