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Nexperia 74LVC1G80GW-Q100,1 product image
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Nexperia 74LVC1G80GW-Q100,1RoHS

Manufacturer
Nexperia
MPN
74LVC1G80GW-Q100,1
LCSC Part #
C548434
Packaging
TSSOP-5-1.3mm
Customer #
Key Attributes
Single D-type flip-flop; positive-edge trigger
Datasheetpdf iconNexperia 74LVC1G80GW-Q100,1
In-Stock: 2,727
2,727 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.3819$ 0.38
10+$ 0.3332$ 3.33
30+$ 0.312$ 9.36
100+$ 0.286$ 28.60
500+$ 0.2747$ 137.35
1,000+$ 0.2682$ 268.20
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Flip Flops
ManufacturerNexperia
PackagingTSSOP-5-1.3mm
Operating Temperature-40℃~+125℃
Voltage - Supply1.65V~5.5V
Number of Bits per Element1
Series74LVC Series
Output Type-
Number of Elements1
Current - Output High(IOH)24mA
Current - Output Low(IOL)24mA
Setup Time500ps
Quiescent Current100nA
Hold Time-100ps
Propagation Delay1.8ns@5V,50pF
Trigger TypeRising Edge
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74LVC1G80-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the overline{Q} output. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V environments. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features

AI Translation
  • Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA
  • Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

Applications

AI Translation
  • Suitable for automotive applications
  • Ideal as a voltage translator in mixed 3.3V and 5V environments
  • Suitable for partial power-down applications