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Nexperia 74LVC1G58GM,115 product image
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Nexperia 74LVC1G58GM,115RoHS

Manufacturer
MPN
74LVC1G58GM,115
LCSC Part #
C548395
Packaging
XSON-6(1x1.5)
Customer #
Key Attributes
Low-power configurable multiple function gate
Datasheetpdf iconNexperia 74LVC1G58GM,115
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QtyUnit PriceTotal Amount
5+$ 0.1036$ 0.52
50+$ 0.0912$ 4.56
150+$ 0.085$ 12.75
500+$ 0.0803$ 40.15
2,500+$ 0.0766$ 191.50
5,000+$ 0.0747$ 373.50
Standard Packaging5000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable
ManufacturerNexperia
PackagingXSON-6(1x1.5)
output type-
Logic Family74LVC Series
Input typeSchmitt Trigger;TTL兼容CMOS
Propagation Delay5.1ns@5.5V,50pF
Voltage - Supply1.65V~5.5V
Operating Temperature-40℃~+125℃
Output Logic Level - Low450mV;300mV;400mV;550mV
Input Logic Level - High-
Input Logic Level - Low-
Current - Output Low(IOL)32mA
Output Logic Level - High1.2V;1.9V;2.2V;2.3V;3.8V
Quiescent Current(Iq)4uA
Current - Output High(IOH)32mA
FeaturesLocal shutdown mode;Overvoltage-tolerant input
Number of Gates1

Introduction

AI Translation

The 74LVC1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected diectly to VCC or GND. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range from 1.65 V to 5.5 V
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Overvoltage tolerant inputs to 5.5 V
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.5 V to 5.5 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
  • Low-power configurable multiple function gate