Nexperia 74LVC1G332GV,125
| Manufacturer | |
| MPN | 74LVC1G332GV,125 |
| LCSC Part # | C548340 |
| Packaging | SC-74 |
| Customer # | |
| Key Attributes | 4uA 1.65V~5.5V 3.5ns@5V,50pF SC-74 Gates and Inverters RoHS |
| Datasheet |  Nexperia 74LVC1G332GV,125 |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | SC-74 | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Input Logic Level - Low | 700mV~800mV | |
| Input Logic Level - High | 1.7V~2V | |
| Operating Temperature | -40℃~+125℃ | |
| Logic Family | 74LVC Series | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Number of Channels | 1;3 | |
| Current - Output High(IOH) | 32mA | |
| Output Logic Level - Low | - | |
| Propagation Delay | 3.5ns@5V,50pF | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G332 is a single 3-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 1.65 V to 5.5 V
- High noise immunity
- Overvoltage tolerant inputs to 5.5 V
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power dissipation
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 250 mA
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
- Level translation in mixed 3.3 V and 5 V environments
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1763 | $ 0.88 |
| 50+ | $ 0.139 | $ 6.95 |
| 150+ | $ 0.123 | $ 18.45 |
| 500+ | $ 0.1031 | $ 51.55 |
| 3,000+ | $ 0.0942 | $ 282.60 |
| 6,000+ | $ 0.0889 | $ 533.40 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | Nexperia | |
| Packaging | SC-74 | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Input Logic Level - Low | 700mV~800mV | |
| Input Logic Level - High | 1.7V~2V | |
| Operating Temperature | -40℃~+125℃ | |
| Logic Family | 74LVC Series | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Number of Channels | 1;3 | |
| Current - Output High(IOH) | 32mA | |
| Output Logic Level - Low | - | |
| Propagation Delay | 3.5ns@5V,50pF | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G332 is a single 3-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 1.65 V to 5.5 V
- High noise immunity
- Overvoltage tolerant inputs to 5.5 V
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power dissipation
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 250 mA
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
- Level translation in mixed 3.3 V and 5 V environments
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |