Nexperia 74AUP1G98GM,115
| Manufacturer | |
| MPN | 74AUP1G98GM,115 |
| LCSC Part # | C545929 |
| Packaging | XSON-6(1x1.5) |
| Customer # | |
| Key Attributes | 4mA 900nA 4mA 800mV~3.6V 1 XSON-6(1x1.5) Gates and Inverters - Multi-Function, Configurable RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | Nexperia | |
| Packaging | XSON-6(1x1.5) | |
| Input Logic Level - High | - | |
| Input Logic Level - Low | - | |
| Logic Family | 74AUP Series | |
| Propagation Delay | 5.2ns@3V,15pF | |
| Current - Output Low(IOL) | 4mA | |
| Output Logic Level - High | 2.6V | |
| Quiescent Current(Iq) | 900nA | |
| Current - Output High(IOH) | 4mA | |
| Voltage - Supply | 800mV~3.6V | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Channels | 1 | |
| Output Logic Level - Low | 440mV |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74AUP1G98 is a configurable multi-function gate with Schmitt-trigger inputs. The device can be configured via 3-bit inputs for any of the following logic functions: multiplexer, AND, OR, NAND, NOR, inverter, and buffer. All inputs can be connected directly to VCC or GND. The device ensures ultralow static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 0.8 V to 3.6 V
- CMOS low power consumption
- High noise immunity
- JEDEC compliant:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-C (2.7 V to 3.6 V)
- Low quiescent current; ICC (max) = 0.9 μA
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Input overvoltage tolerance up to 3.6 V
- Low noise overshoot and undershoot < 10% of VCC
- IOFF circuit supports partial power-down mode operation
- ESD protection:
- HBM: exceeds 5000 V, ANSI/ESDA/JEDEC JS-001 Class 3A
- CDM: exceeds 1000 V, ANSI/ESDA/JEDEC JS-002 Class C3
- Multiple package options
- Operating temperature range: -40 °C to +85 °C and -40 °C to +125 °C
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 0.2822 | $ 0.28 |
| 200+ | $ 0.1093 | $ 21.86 |
| 500+ | $ 0.1054 | $ 52.70 |
| 1,000+ | $ 0.1035 | $ 103.50 |
Standard Packaging5000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | Nexperia | |
| Packaging | XSON-6(1x1.5) | |
| Input Logic Level - High | - | |
| Input Logic Level - Low | - | |
| Logic Family | 74AUP Series | |
| Propagation Delay | 5.2ns@3V,15pF | |
| Current - Output Low(IOL) | 4mA | |
| Output Logic Level - High | 2.6V | |
| Quiescent Current(Iq) | 900nA | |
| Current - Output High(IOH) | 4mA | |
| Voltage - Supply | 800mV~3.6V | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Channels | 1 | |
| Output Logic Level - Low | 440mV |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74AUP1G98 is a configurable multi-function gate with Schmitt-trigger inputs. The device can be configured via 3-bit inputs for any of the following logic functions: multiplexer, AND, OR, NAND, NOR, inverter, and buffer. All inputs can be connected directly to VCC or GND. The device ensures ultralow static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 0.8 V to 3.6 V
- CMOS low power consumption
- High noise immunity
- JEDEC compliant:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-C (2.7 V to 3.6 V)
- Low quiescent current; ICC (max) = 0.9 μA
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Input overvoltage tolerance up to 3.6 V
- Low noise overshoot and undershoot < 10% of VCC
- IOFF circuit supports partial power-down mode operation
- ESD protection:
- HBM: exceeds 5000 V, ANSI/ESDA/JEDEC JS-001 Class 3A
- CDM: exceeds 1000 V, ANSI/ESDA/JEDEC JS-002 Class C3
- Multiple package options
- Operating temperature range: -40 °C to +85 °C and -40 °C to +125 °C
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

